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ORCIDNagavijayalakshmi Vydyanathan
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2010 – 2019
- 2018
[c14]Rupak Mukherjee
, R. Ganesh, Vinod Saini, Udaya Maurya, Nagavijayalakshmi Vydyanathan, Bharatkumar Sharma:
Three Dimensional Pseudo-Spectral Compressible Magnetohydrodynamic GPU Code for Astrophysical Plasma Simulation. HiPC Workshops 2018: 46-55- [c13]Apurva Raj, Somnath Roy, Nagavijayalakshmi Vydyanathan, Bharatkumar Sharma:
Acceleration of a 3D Immersed Boundary Solver Using OpenACC. HiPC Workshops 2018: 65-73 - 2015
- [c12]Mrugesh R. Gajjar, Naga Vydyanathan:
Fast dynamic time warping using low-rank matrix approximations. SiPS 2015: 1-6 - 2013
- [c11]Jyotsna Khemka, Mrugesh R. Gajjar, Sharan Vaswani, Naga Vydyanathan, Rama Malladi, Vinutha S. V:
Performance evaluation of medical imaging algorithms on Intel® MIC platform. HiPC 2013: 396-404 - [i1]Rahul Thota, Sharan Vaswani, Amit A. Kale, Nagavijayalakshmi Vydyanathan:
Fast 3D Salient Region Detection in Medical Images using GPUs. CoRR abs/1310.6736 (2013) - 2011
- [j2]Naga Vydyanathan, Ümit V. Çatalyürek, Tahsin M. Kurç, Ponnuswamy Sadayappan, Joel H. Saltz:
Optimizing latency and throughput of application workflows on clusters. Parallel Comput. 37(10-11): 694-712 (2011) - 2010
- [c10]Bharatkumar Sharma, Naga Vydyanathan:
Parallel discrete wavelet transform using the Open Computing Language: a performance and portability study. IPDPS Workshops 2010: 1-8
2000 – 2009
- 2009
- [j1]Nagavijayalakshmi Vydyanathan, Sriram Krishnamoorthy, Gerald M. Sabin, Ümit V. Çatalyürek, Tahsin M. Kurç, P. Sadayappan, Joel H. Saltz:
An Integrated Approach to Locality-Conscious Processor Allocation and Scheduling of Mixed-Parallel Applications. IEEE Trans. Parallel Distributed Syst. 20(8): 1158-1172 (2009) - [c9]Bharatkumar Sharma, Rahul Thota, Naga Vydyanathan, Amit A. Kale:
Towards a robust, real-time face processing system using CUDA-enabled GPUs. HiPC 2009: 368-377 - [c8]Muthu Manikandan Baskaran, Nagavijayalakshmi Vydyanathan, Uday Bondhugula, J. Ramanujam, Atanas Rountev, P. Sadayappan:
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors. PPoPP 2009: 219-228 - 2008
- [c7]Nagavijayalakshmi Vydyanathan, Ümit V. Çatalyürek, Tahsin M. Kurç, P. Sadayappan, Joel H. Saltz:
A Duplication Based Algorithm for Optimizing Latency Under Throughput Constraints for Streaming Workflows. ICPP 2008: 254-261 - 2007
- [c6]Nagavijayalakshmi Vydyanathan, Ümit V. Çatalyürek, Tahsin M. Kurç, P. Sadayappan, Joel H. Saltz:
Toward Optimizing Latency Under Throughput Constraints for Application Workflows on Clusters. Euro-Par 2007: 173-183 - 2006
- [c5]Nagavijayalakshmi Vydyanathan, Sriram Krishnamoorthy, Gerald Sabin, Ümit V. Çatalyürek, Tahsin M. Kurç, P. Sadayappan, Joel H. Saltz:
Locality Conscious Processor Allocation and Scheduling for Mixed Parallel Applications. CLUSTER 2006 - [c4]Gaurav Khanna, Nagavijayalakshmi Vydyanathan, Ümit V. Çatalyürek, Tahsin M. Kurç, Sriram Krishnamoorthy, P. Sadayappan, Joel H. Saltz:
Task Scheduling and File Replication for Data-Intensive Jobs with Batch-shared I/O. HPDC 2006: 241-252 - [c3]Nagavijayalakshmi Vydyanathan, Sriram Krishnamoorthy, Gerald Sabin, Ümit V. Çatalyürek, Tahsin M. Kurç, P. Sadayappan, Joel H. Saltz:
An Integrated Approach for Processor Allocation and Scheduling of Mixed-Parallel Applications. ICPP 2006: 443-450 - 2005
- [c2]Gaurav Khanna, Nagavijayalakshmi Vydyanathan, Tahsin M. Kurç, Ümit V. Çatalyürek, Pete Wyckoff, Joel H. Saltz, P. Sadayappan:
A hypergraph partitioning based approach for scheduling of tasks with batch-shared I/O. CCGRID 2005: 792-799 - 2004
- [c1]Nagavijayalakshmi Vydyanathan, Gaurav Khanna, Tahsin M. Kurç, Ümit V. Çatalyürek, Pete Wyckoff, Joel H. Saltz, P. Sadayappan:
Use of PVFS for Efficient Execution of Jobs with Pipeline-Shared I/O. GRID 2004: 235-242
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