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Jaehyeong Sim
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Journal Articles
- 2024
- [j8]Jieui Kang, Jihye Park, Soeun Choi, Jaehyeong Sim:
Q-LAtte: An Efficient and Versatile LSTM Model for Quantized Attention-Based Time Series Forecasting in Building Energy Applications. IEEE Access 12: 69325-69341 (2024) - 2022
- [j7]Myeonggu Kang, Hyeonuk Kim, Hyein Shin, Jaehyeong Sim, Kyeonghan Kim, Lee-Sup Kim:
S-FLASH: A NAND Flash-Based Deep Neural Network Accelerator Exploiting Bit-Level Sparsity. IEEE Trans. Computers 71(6): 1291-1304 (2022) - 2020
- [j6]Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim:
An Energy-Efficient Deep Convolutional Neural Network Training Accelerator for In Situ Personalization on Smart Devices. IEEE J. Solid State Circuits 55(10): 2691-2702 (2020) - [j5]Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim:
CREMON: Cryptography Embedded on the Convolutional Neural Network Accelerator. IEEE Trans. Circuits Syst. 67-II(12): 3337-3341 (2020) - [j4]Jaehyeong Sim, Somin Lee, Lee-Sup Kim:
An Energy-Efficient Deep Convolutional Neural Network Inference Processor With Enhanced Output Stationary Dataflow in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 28(1): 87-100 (2020) - 2017
- [j3]Yeongjae Choi, Dongmyung Bae, Jaehyeong Sim, Seungkyu Choi, Minhye Kim, Lee-Sup Kim:
Energy-Efficient Design of Processing Element for Convolutional Neural Network. IEEE Trans. Circuits Syst. II Express Briefs 64-II(11): 1332-1336 (2017) - 2016
- [j2]Taeho Lee, Yong-Hun Kim, Jaehyeong Sim, Jun-Seok Park, Lee-Sup Kim:
A 5-Gb/s 2.67-mW/Gb/s Digital Clock and Data Recovery With Hybrid Dithering Using a Time-Dithered Delta-Sigma Modulator. IEEE Trans. Very Large Scale Integr. Syst. 24(4): 1450-1459 (2016) - 2013
- [j1]Seungwook Paek, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim:
PowerField: A Probabilistic Approach for Temperature-to-Power Conversion Based on Markov Random Field Theory. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32(10): 1509-1519 (2013)
Conference and Workshop Papers
- 2023
- [c14]Jieui Kang, Jaehyeong Sim, Hyokyung Bahn:
Optimization of the Modified Gaussian Filter for Mobile GPU Usage in Game Workloads. CCCI 2023: 1-8 - [c13]HaYoung Lim, Yeseo Jang, Juyeon Kim, Jaehyeong Sim:
TD-NAAS: Template-Based Differentiable Neural Architecture Accelerator Search. ISOCC 2023: 143-144 - 2019
- [c12]Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Yeongjae Choi, Hyeonuk Kim, Lee-Sup Kim:
A 47.4µJ/epoch Trainable Deep Convolutional Neural Network Accelerator for In-Situ Personalization on Smart Devices. A-SSCC 2019: 57-60 - [c11]Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim:
NAND-Net: Minimizing Computational Complexity of In-Memory Processing for Binary Neural Networks. HPCA 2019: 661-673 - [c10]Youngbeom Jung, Yeongjae Choi, Jaehyeong Sim, Lee-Sup Kim:
eSRCNN: A Framework for Optimizing Super-Resolution Tasks on Diverse Embedded CNN Accelerators. ICCAD 2019: 1-8 - [c9]Kyeonghan Kim, Hyein Shin, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim:
An Energy-efficient Processing-in-memory Architecture for Long Short Term Memory in Spin Orbit Torque MRAM. ICCAD 2019: 1-8 - [c8]Hyein Shin, Jaehyeong Sim, Daewoong Lee, Lee-Sup Kim:
A PVT-robust Customized 4T Embedded DRAM Cell Array for Accelerating Binary Neural Networks. ICCAD 2019: 1-8 - 2018
- [c7]Jaehyeong Sim, Hoseok Seol, Lee-Sup Kim:
NID: processing binary convolutional neural network in commodity DRAM. ICCAD 2018: 10 - [c6]Seungkyu Choi, Jaehyeong Sim, Myeonggu Kang, Lee-Sup Kim:
TrainWare: A Memory Optimized Weight Update Architecture for On-Device Convolutional Neural Network Training. ISLPED 2018: 19:1-19:6 - 2017
- [c5]Hyeonuk Kim, Jaehyeong Sim, Yeongjae Choi, Lee-Sup Kim:
A Kernel Decomposition Architecture for Binary-weight Convolutional Neural Networks. DAC 2017: 60:1-60:6 - [c4]Myung-Hoon Choi, Seungkyu Choi, Jaehyeong Sim, Lee-Sup Kim:
SENIN: An energy-efficient sparse neuromorphic system with on-chip learning. ISLPED 2017: 1-6 - 2016
- [c3]Jaehyeong Sim, Jun-Seok Park, Minhye Kim, Dongmyung Bae, Yeongjae Choi, Lee-Sup Kim:
14.6 A 1.42TOPS/W deep convolutional neural network recognition processor for intelligent IoE systems. ISSCC 2016: 264-265 - 2014
- [c2]Jaehyeong Sim, Jun-Seok Park, Seungwook Paek, Lee-Sup Kim:
Timing error masking by exploiting operand value locality in SIMD architecture. ICCD 2014: 90-96 - 2012
- [c1]Seungwook Paek, Seok-Hwan Moon, Wongyu Shin, Jaehyeong Sim, Lee-Sup Kim:
PowerField: a transient temperature-to-power technique based on Markov random field theory. DAC 2012: 630-635
Coauthor Index
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