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ORCIDSudhir M. Gowda
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2000 – 2009
- 2006
[j7]John F. Bulzacchelli, Mounir Meghelli, Sergey V. Rylov
, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, Lei Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10-Gb/s 5-Tap DFE/4-Tap FFE Transceiver in 90-nm CMOS Technology. IEEE J. Solid State Circuits 41(12): 2885-2900 (2006)- [c4]Mounir Meghelli, Sergey V. Rylov, John F. Bulzacchelli, Woogeun Rhee, Alexander V. Rylyakov, Herschel A. Ainspan, Benjamin D. Parker, Michael P. Beakes, Aichin Chung, Troy J. Beukema, Petar K. Pepeljugoski, L. Shan, Young Hoon Kwark, Sudhir M. Gowda, Daniel J. Friedman:
A 10Gb/s 5-Tap-DFE/4-Tap-FFE Transceiver in 90nm CMOS. ISSCC 2006: 213-222 - 2005
- [j6]Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna:
10+ gb/s 90-nm CMOS serial link demo in CBGA package. IEEE J. Solid State Circuits 40(9): 1987-1991 (2005) - 2004
- [c3]Sergey V. Rylov, Scott K. Reynolds, Daniel W. Storaska, Brian A. Floyd, Mohit Kapur, Thomas Zwick, Sudhir M. Gowda, Michael Sorna:
10+ Gb/s 90nm CMOS serial link demo in CBGA package. CICC 2004: 27-30 - 2003
- [j5]Hui Wu, José A. Tierno, Petar K. Pepeljugoski, Jeremy Schaub, Sudhir M. Gowda, Jeffrey A. Kash, Ali Hajimiri:
Integrated transversal equalizers in high-speed fiber-optic systems. IEEE J. Solid State Circuits 38(12): 2131-2137 (2003) - [c2]Woogeun Rhee, Herschel A. Ainspan, Sergey V. Rylov, Alexander V. Rylyakov, Michael P. Beakes, Daniel J. Friedman, Sudhir M. Gowda, Mehmet Soyuer:
A 10-Gb/s CMOS clock and data recovery circuit using a secondary delay-locked loop. CICC 2003: 81-84
1990 – 1999
- 1995
- [j4]Hyun J. Shin, Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner:
Custom design of CMOS low-power high-performance digital signal-processing macro for hard-disk-drive applications. IBM J. Res. Dev. 39(1-2): 83-92 (1995) - [j3]Dale J. Pearson, Scott K. Reynolds, Andrew C. Megdanis, Sudhir M. Gowda, Kevin R. Wrenner, Michael Immediato, Richard L. Galbraith, Hyun J. Shin:
Digital FIR filters for high speed PRML disk read channels. IEEE J. Solid State Circuits 30(12): 1517-1523 (1995) - 1994
- [j2]Sudhir M. Gowda, Bing J. Sheu:
BSIM plus: an advanced SPICE model for submicron MOS VLSI circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 13(9): 1166-1170 (1994) - [j1]Sudhir M. Gowda, Bing J. Sheu, Wen-Jay Hsu:
Testing of programmable analog neural network chips. J. VLSI Signal Process. 8(3): 267-282 (1994) - 1991
- [c1]Wen-Jay Hsu, Bing J. Sheu, Sudhir M. Gowda:
Testing of Analog Neural Array-Processor Chips. ICCD 1991: 118-121
Coauthor Index
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