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2020 – today
- 2023
[j11]Tuhin Kr. Biswas, Kinsuk Giri, Samir Roy:
ECKM: An improved K-means clustering based on computational geometry. Expert Syst. Appl. 212: 118862 (2023)
2010 – 2019
- 2019
- [j10]Udit Kr. Chakraborty, Debanjan Konar
, Samir Roy, Sankhayan Choudhury:
Automatic short answer grading using rough concept clusters. Int. J. Adv. Intell. Paradigms 14(3/4): 260-280 (2019) - 2018
- [j9]Suman Bhattacharya, Sankhayan Chowdhury, Samir Roy:
An effective e-learning system through learners' scaffolding. Int. J. Adv. Intell. Paradigms 10(3): 290-304 (2018) - [j8]Suman Bhattacharya, Samir Roy, Sankhayan Chowdhury:
A neural network-based intelligent cognitive state recognizer for confidence-based e-learning system. Neural Comput. Appl. 29(1): 205-219 (2018) - 2017
- [j7]Udit Kr. Chakraborty, Samir Roy, Sankhayan Choudhury:
A Fuzzy Indiscernibility Based Measure of Distance between Semantic Spaces Towards Automatic Evaluation of Free Text Answers. Int. J. Uncertain. Fuzziness Knowl. Based Syst. 25(6): 987-1004 (2017) - 2016
- [j6]Udit Kr. Chakraborty, Debanjan Konar, Samir Roy, Sankhayan Choudhury:
Intelligent fuzzy spelling evaluator for e-Learning systems. Educ. Inf. Technol. 21(1): 171-184 (2016) - 2014
- [c15]Udit Kr. Chakraborty, Rashmi Gurung, Samir Roy:
Semantic Similarity Based Approach for Automatic Evaluation of Free Text Answers Using Link Grammar. T4E 2014: 218-221 - 2013
- [c14]Prasenjit Basu, Suman Bhattacharya, Samir Roy:
Online Recommendation of Learning Path for an E-Learner under Virtual University. ICDCIT 2013: 126-136 - 2011
- [c13]Udit Kr. Chakraborty, Samir Roy:
Fuzzy Automata Inspired Intelligent Assesment of Learning Achievement. IICAI 2011: 1505-1518
2000 – 2009
- 2006
- [j5]Samir Roy, Michael Junk, S. Sundar:
Understanding the porosity dependence of heat flux through glass fiber insulation. Math. Comput. Model. 43(5-6): 485-492 (2006) - [c12]Samir Roy, Biswajit Saha:
Minority Gate Oriented Logic Design with Quantum-Dot Cellular Automata. ACRI 2006: 646-656 - 2005
- [j4]Biplab K. Sikdar, Samir Roy, Debesh K. Das:
A Degree-of-Freedom Based Synthesis Scheme for Sequential Machines with Enhanced BIST Quality and Reduced Area. J. Electron. Test. 21(1): 83-93 (2005) - [c11]Biplab K. Sikdar, Arijit Sarkar, Samir Roy, Debesh K. Das:
Synthesis of Testable Finite State Machine Through Decomposition. Asian Test Symposium 2005: 398-403 - [c10]Biplab K. Sikdar, Sukanta Das, Samir Roy, Niloy Ganguly, Debesh K. Das:
Cellular Automata Based Test Structures with Logic Folding. VLSI Design 2005: 71-74 - 2004
- [c9]Chandrama Shaw, Pradipta Maji, Sourav Saha, Biplab K. Sikdar, Samir Roy, Parimal Pal Chaudhuri:
Cellular Automata Based Encompression Technology for Voice Data. ACRI 2004: 258-267 - 2003
- [j3]Miklos Feher, Eugen Deretey, Samir Roy:
BHB: A Simple Knowledge-Based Scoring Function to Improve the Efficiency of Database Screening. J. Chem. Inf. Comput. Sci. 43(4): 1316-1327 (2003) - [c8]Samir Roy, Ujjwal Maulik, Sanghamitra Bandyopadhyay, Subhadip Basu, Biplab Kumar Sikdar:
Efficient BIST design for sequential machines using FiF-FoF values in machine states. ASP-DAC 2003: 875-878 - [c7]Samir Roy, Biplab K. Sikdar:
Power Conscious BIST Design for Sequential Circuits Using ghost-FSM. Asian Test Symposium 2003: 190-195 - [c6]Samir Roy, Sanghamitra Bandyopadhyay, Ujjwal Maulik:
Evolutionary Approach to Solve the Complex-Triangle Elimination (CTE) Problem of VLSI Floor-planning. IICAI 2003: 646-655 - [c5]Samir Roy, Ujjwal Maulik, Biplab K. Sikdar:
Exploiting Ghost-FSMs as a BIST Structure for Sequential Machines. VLSI Design 2003: 155-160 - 2002
- [c4]Samir Roy, Biplab K. Sikdar, Monalisa Mukherjee, Debesh K. Das:
Degree-of-Freedom Analysis for Sequential Machines Targeting BIST Quality and Gate Area. ASP-DAC/VLSI Design 2002: 671-676 - 2001
- [c3]Biplab K. Sikdar, Samir Roy, Debesh K. Das:
Enhancing BIST Quality of Sequential Machines through Degree-of-Freedom Analysis. Asian Test Symposium 2001: 285-
1990 – 1999
- 1997
- [j2]Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri:
KGPMIN: an efficient multilevel multioutput AND-OR-XOR minimizer. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(3): 257-265 (1997) - 1996
- [j1]Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri:
Synthesis of Highly Testable Fixed-Polarity AND-XOR Canonical Networks-A Genetic Algorithm-Based Approach. IEEE Trans. Computers 45(4): 487-490 (1996) - 1995
- [c2]Santanu Chattopadhyay, Samir Roy, Parimal Pal Chaudhuri:
Technology mapping on a multi-output logic module built around Cellular Automata Array for a new FPGA architecture. VLSI Design 1995: 57-62 - 1993
- [c1]Sukumar Nandi, Vamsi Boppana, Supratik Chakraborty, Parimal Pal Chaudhuri, Samir Roy:
Delay Fault Test Generation with Cellular Automata. VLSI Design 1993: 281-286
Coauthor Index
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