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ORCIDJung Hwan Choi
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2020 – today
- 2023
[j6]Hana Kim
, Hyun Eun, Jung Hwan Choi, Ji-Hoon Kim:
Complexity-Aware Layer-Wise Mixed-Precision Schemes With SQNR-Based Fast Analysis. IEEE Access 11: 117800-117809 (2023)- 2022
- [c10]Ha-Na Kim, Hyun Eun, Jung Hwan Choi, Ji-Hoon Kim:
SQNR-based Layer-wise Mixed-Precision Schemes with Computational Complexity Consideration. ISCAS 2022: 234-235
2010 – 2019
- 2010
- [j5]Jongsun Park, Jung Hwan Choi, Kaushik Roy:
Dynamic Bit-Width Adaptation in DCT: An Approach to Trade Off Image Quality and Computation Energy. IEEE Trans. Very Large Scale Integr. Syst. 18(5): 787-793 (2010) - [c9]Jung Hwan Choi, Byung Guk Kim, Aurobindo Dasgupta, Kaushik Roy:
Improved clock-gating control scheme for transparent pipeline. ASP-DAC 2010: 401-406
2000 – 2009
- 2009
- [j4]Jung Hwan Choi, Nilanjan Banerjee, Kaushik Roy:
Variation-Aware Low-Power Synthesis Methodology for Fixed-Point FIR Filters. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(1): 87-97 (2009) - [j3]Nilanjan Banerjee, Georgios Karakonstantis, Jung Hwan Choi, Chaitali Chakrabarti, Kaushik Roy:
Design Methodology for Low Power and Parametric Robustness Through Output-Quality Modulation: Application to Color-Interpolation Filtering. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(8): 1127-1137 (2009) - 2008
- [j2]Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Profit Aware Circuit Design Under Process Variations Considering Speed Binning. IEEE Trans. Very Large Scale Integr. Syst. 16(7): 806-815 (2008) - [c8]Minu Park, Jung Hwan Choi, Hyunseung Choo:
Enhanced Westwood as per Vegas-Based Estimator with Slowstart Threshold for High-Speed Networks. ICCSA Workshops 2008: 92-99 - [c7]Swaroop Ghosh, Jung Hwan Choi, Patrick Ndai, Kaushik Roy:
O2C: occasional two-cycle operations for dynamic thermal management in high performance in-order microprocessors. ISLPED 2008: 189-192 - 2007
- [j1]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Self-Consistent Approach to Leakage Power and Temperature Estimation to Predict Thermal Runaway in FinFET Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26(11): 2059-2068 (2007) - [c6]Jung Hwan Choi, Jayathi Murthy, Kaushik Roy:
The effect of process variation on device temperature in FinFET circuits. ICCAD 2007: 747-751 - [c5]Nilanjan Banerjee, Jung Hwan Choi, Kaushik Roy:
A process variation aware low power synthesis methodology for fixed-point FIR filters. ISLPED 2007: 147-152 - 2006
- [c4]Aditya Bansal, Mesut Meterelliyoz, Siddharth Singh, Jung Hwan Choi, Jayathi Murthy, Kaushik Roy:
Compact thermal models for estimation of temperature-dependent power/performance in FinFET technology. ASP-DAC 2006: 237-242 - [c3]Animesh Datta, Swarup Bhunia, Jung Hwan Choi, Saibal Mukhopadhyay, Kaushik Roy:
Speed binning aware design methodology to improve profit under parameter variations. ASP-DAC 2006: 712-717 - [c2]Jongsun Park, Jung Hwan Choi, Kaushik Roy:
Dynamic bit-width adaptation in DCT: image quality versus computation energy trade-off. DATE 2006: 520-521 - [c1]Jung Hwan Choi, Aditya Bansal, Mesut Meterelliyoz, Jayathi Murthy, Kaushik Roy:
Leakage power dependent temperature estimation to predict thermal runaway in FinFET circuits. ICCAD 2006: 583-586
Coauthor Index
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