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ORCIDYves Berviller
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2020 – today
- 2023
[j7]Yves Berviller
, Masoomeh Shireen Ansarnia, Etienne Tisserand, Patrick Schweitzer, Alain Trémeau:
Road User Position and Speed Estimation via Deep Learning from Calibrated Fisheye Videos. Sensors 23(5): 2637 (2023)- 2022
- [j6]Masoomeh Shireen Ansarnia, Etienne Tisserand, Patrick Schweitzer, Mohamed Amine Zidane, Yves Berviller:
Contextual Detection of Pedestrians and Vehicles in Orthophotography by Fusion of Deep Learning Algorithms. Sensors 22(4): 1381 (2022)
2010 – 2019
- 2013
- [c13]Eric Dabellani, Hassan Rabah, Nicolas Marques, Yves Berviller, Slavisa Jovanovic, Serge Weber:
Modeling and FPGA implementation of reconfigurable transcoder for real time video adaptation. ICECS 2013: 329-332 - 2012
- [j5]Afandi Ahmad, Abbes Amira, Hassan Rabah, Yves Berviller:
Medical image denoising on field programmable gate array using finite Radon transform. IET Signal Process. 6(9): 862-870 (2012) - 2011
- [c12]Michael Guarisco, Eric Dabellani, Nicolas Marques, Hassan Rabah, Yves Berviller, Serge Weber:
An efficient VLSI implementation of H.264/AVC intra-frame transcoder. ICECS 2011: 1-4 - 2010
- [c11]Afandi Ahmad, Abbes Amira, Hassan Rabah, Yves Berviller:
FPGA-based architectures of finite radon transform for medical image de-noising. APCCAS 2010: 20-23 - [c10]Afandi Ahmad, Abbes Amira, Michael Guarisco, Hassan Rabah, Yves Berviller:
Efficient implementation of a 3-D medical imaging compression system using CAVLC. ICIP 2010: 3773-3776
2000 – 2009
- 2009
- [j4]Camel Tanougast, Michael Janiaut, Yves Berviller, Hassan Rabah, Serge Weber, Ahmed Bouridane:
An Embedded and Programmable System Based FPGA for Real Time MPEG Stream Buffer Analysis. IEEE Trans. Circuits Syst. Video Technol. 19(2): 237-249 (2009) - [c9]Michael Guarisco, Hassan Rabah, Yves Berviller, Serge Weber, Said Belkouch:
FPGA-based SoC for transcoding H264/AVC-SVC with low latency and high bitrate entropy coding. SoCC 2009: 423-426 - 2007
- [j3]Oscar Pérez, Yves Berviller, Camel Tanougast, Serge Weber:
The Use of Runtime Reconfiguration on FPGA Circuits to Increase the Performance of the AES Algorithm Implementation. J. Univers. Comput. Sci. 13(3): 349-362 (2007) - [c8]Shahram Karimi, Philippe Poure, Yves Berviller, Shahrokh Saadate:
A Design Methodology for Power Electronics Digital Control based on an FPGA in the Loop Prototyping. ICECS 2007: 701-704 - 2005
- [c7]Michael Janiaut, Camel Tanougast, Hassan Rabah, Yves Berviller, Christian Mannino, Serge Weber:
Configurable hardware implementation of a conceptual decoder for a real-time MPEG-2 analysis. FPL 2005: 386-390 - 2004
- [c6]Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber:
FPGA Implementation of a Novel Architecture for PCR Related Measurements In DVB-T. ESA/VLSI 2004: 606-610 - [c5]Christian Mannino, Hassan Rabah, Camel Tanougast, Yves Berviller, Michael Janiaut, Serge Weber:
FPGA Implementation of a Novel All Digital PLL Architecture for PCR Related Measurements in DVB-T. FPL 2004: 1027-1031 - [c4]Camel Tanougast, Yves Berviller, Christian Mannino, Hassan Rabah, Michael Janiaut, Serge Weber:
SystemC Model of a MPEG-2 DVB-T Bit-Rate Measurement Architecture for FPGA Implementation. IEEE International Workshop on Rapid System Prototyping 2004: 157-163 - 2003
- [j2]Camel Tanougast, Yves Berviller, Serge Weber, Philippe Brunet:
A Partitioning Methodology That Optimises the Area on Reconfigurable Real-Time Embedded Systems. EURASIP J. Adv. Signal Process. 2003(6): 494-501 (2003) - [j1]Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber, Hassan Rabah:
Temporal partitioning methodology optimizing FPGA resources for dynamically reconfigurable embedded real-time system. Microprocess. Microsystems 27(3): 115-130 (2003) - [c3]Camel Tanougast, Yves Berviller, Philippe Brunet, Serge Weber:
Automated RTR Temporal Partitioning for Reconfigurable Embedded Real-Time System Design. IPDPS 2003: 178 - [c2]Philippe Brunet, Camel Tanougast, Yves Berviller, Serge Weber:
Hardware Partitioning Software for Dynamically Reconfigurable SoC Design. IWSOC 2003: 106-111 - 2000
- [c1]Camel Tanougast, Yves Berviller, Serge Weber:
Optimization of Motion Estimator for Run-Time-Reconfiguration Implementation. IPDPS Workshops 2000: 959-965
Coauthor Index
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