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2020 – today
- 2024
[j9]Xiangyue Xiao, Junhua Ding
, Mingyan Yu, Zhicai Dong, Sara Cruz, Nai Ding, Charlène Aubinet, Steven Laureys, Haibo Di, Yan Chen:
Exploring the clinical diagnostic value of linguistic learning ability in patients with disorders of consciousness using electrooculography. NeuroImage 297: 120753 (2024)- 2023
- [j8]Xinsheng Wang, Yanhong Song, Mingyan Yu:
Comprehensive probability method of buffer insertion based on Gaussian fitting under process variation condition. Microelectron. J. 134: 105728 (2023) - [c24]Xinhuan Yang, Mingyan Yu, Xingyu Fang, Liang Wang, Chuanzheng Wang, Yuanfu Zhao:
A Study of the States Kinetics in NBTI and HCI Degradation based on TCAD. EEET 2023: 161-165
2010 – 2019
- 2018
- [j7]Xinsheng Wang, Mingyan Yu, Chenxu Wang:
Structure-Preserving-Based Model-Order Reduction of Parameterized Interconnect Systems. Circuits Syst. Signal Process. 37(1): 19-48 (2018) - [j6]Xinsheng Wang, Mingyan Yu:
The Error Bound of Timing Domain in Model Order Reduction by Krylov Subspace Methods. J. Circuits Syst. Comput. 27(6): 1850093:1-1850093:19 (2018) - 2017
- [j5]Xinsheng Wang, Chenxu Wang, Mingyan Yu:
The Minimum Norm Least-Squares Solution in Reduction by Krylov Subspace Methods. J. Circuits Syst. Comput. 26(1): 1750006:1-1750006:18 (2017) - 2016
- [j4]Xinsheng Wang, Chenxu Wang, Mingyan Yu:
Swarm intelligence algorithm for interconnect model order reduction with sub-block structure preserving. Int. J. Syst. Sci. 47(9): 2178-2192 (2016) - 2015
- [c23]Xinsheng Wang, Wenpan Liu, Mingyan Yu:
A distinctive O(mn) time algorithm for optimal buffer insertions. ISQED 2015: 293-297 - 2013
- [j3]Chenxu Wang, Jinghu Li, Mingyan Yu, Jinxiang Wang:
An intelligent classification method for Trojan detection based on side-channel analysis. IEICE Electron. Express 10(17): 20130602 (2013) - [j2]Xinsheng Wang, Yizhe Hu, Liang Han, Jinghu Li, Chenxu Wang, Mingyan Yu:
A Low Power and variation-Insensitive Current-Mode Signaling Scheme. J. Circuits Syst. Comput. 22(8) (2013) - [c22]Xinsheng Wang, Mingyang Hu, Mingyan Yu:
Robust current-mode on-chip interconnect signaling scheme in deep submicron. ASICON 2013: 1-4 - [c21]Yuanxu Xu, Mingyan Yu, Chao Zhang, Bing Yang:
The Analysis of Generic SIMT Scheduling Model Extracted from GPU. NCCET 2013: 9-18 - 2012
- [c20]Chenxu Wang, Mingyan Yu, Jinxiang Wang, Peihe Jiang, Xiaochen Tang:
A more practical CPA attack against present hardware implementation. CCIS 2012: 1248-1253 - [c19]Pengfei Gou, Bing Yang, Mingyan Yu, Zhigang Mao:
Novel O-GEHL Based Hyperblock Predictor for EDGE Architectures. NAS 2012: 172-180 - 2011
- [c18]Yongsheng Wang, Yuanhong Li, Mingyan Yu:
A 16 bit low voltage low power Delta Sigma modulator. EMEIT 2011: 3178-3181 - [c17]Xinsheng Wang, Mingyan Yu:
Power Research of JPEG Circuits in FPGA. IIH-MSP 2011: 206-208 - 2010
- [c16]Pengfei Gou, Qingbo Li, Yinghan Jin, Qi Zheng, Bing Yang, Mingyan Yu, Jinxiang Wang:
M5 based EDGE architecture modeling. ICCD 2010: 289-296 - [c15]Fangfa Fu, Siyue Sun, Xin'an Hu, Junjie Song, Jinxiang Wang, Mingyan Yu:
MMPI: A flexible and efficient multiprocessor message passing interface for NoC-based MPSoC. SoCC 2010: 359-362
2000 – 2009
- 2009
- [c14]Zhiqiang Gao, Jinxiang Wang, Fengchang Lai, Mingyan Yu, Zhongzhao Zhang:
Wideband reconfigurable CMOS Gm-C filter For wireless applications. ICECS 2009: 179-182 - 2008
- [j1]Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye:
A Fully Integrated CMOS Active Bandpass Filter for Multiband RF Front-Ends. IEEE Trans. Circuits Syst. II Express Briefs 55-II(8): 718-722 (2008) - 2006
- [c13]Qianneng Zhou, Fengchang Lai, Mingyan Yu:
Embedded DC-DC Voltage Down Converter for Low-Power VLSI Chip. APCCAS 2006: 670-673 - [c12]Zhiyuan Li, Mingyan Yu, Jianguo Ma:
A Novel Input Stage Based on DTMOS for Low-Voltage Low-Noise Operational Amplifier. APCCAS 2006: 1591-1594 - [c11]Tong Zhou, Zhibo Zhou, Mingyan Yu, Yizheng Ye:
Design of A Low Power High Entropy Chaos-Based Truly Random Number Generator. APCCAS 2006: 1955-1958 - [c10]Zhiyuan Li, Fengchang Lai, Mingyan Yu:
Low-noise high-precision operational amplifier using vertical NPN transistor in CMOS technology. ACM Great Lakes Symposium on VLSI 2006: 123-126 - [c9]Qianneng Zhou, Fengchang Lai, Mingyan Yu:
On-chip 3.3V-to-1.8V voltage down converter for low-power VLSI chips. ACM Great Lakes Symposium on VLSI 2006: 140-143 - [c8]Zhiqiang Gao, Mingyan Yu, Yizheng Ye, Jianguo Ma:
A CMOS bandpass filter with wide-tuning range for wireless applications. ISCAS 2006 - [c7]Guochi Huang, Tae-Sung Kim, Byung-Sung Kim, Mingyan Yu, Yizheng Ye:
Post linearization of CMOS LNA using double cascade FETs. ISCAS 2006 - [c6]Tong Zhou, Mingyan Yu, Yizheng Ye:
A Pipelined Switched-Current Chaotic System for the High-Speed Truly Random Number Generation in Crypto Processor. VLSI Design 2006: 216-221 - [c5]Zhiyuan Li, Mingyan Yu, Jianguo Ma:
A Rail-to-Rail I/O Operational Amplifier with 0.5% gm Fluctuation Using Double P-channel Differential Input Pairs. VLSI Design 2006: 563-568 - 2005
- [c4]Zhiqiang Gao, Jianguo Ma, Yizheng Ye, Mingyan Yu:
Large tuning band range of high frequency filter for wireless applications. ISCAS (1) 2005: 384-387 - [c3]Zhiqiang Gao, Jianguo Ma, Mingyan Yu, Yizheng Ye:
A CMOS RF tuning wide-band bandpass filter for wireless applications. SoCC 2005: 79-80 - 2003
- [c2]Yongsheng Wang, Liyi Xiao, Mingyan Yu, Jinxiang Wang, Yizheng Ye:
A Test Architecture for System-on-a-Chip. Asian Test Symposium 2003: 506 - 2002
- [c1]Yuxin You, Jinxiang Wang, Mingyan Yu, Yizheng Ye:
Design and implementation of concatenated decoder. DCV 2002: 135-142
Coauthor Index
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last updated on 2024-09-26 01:51 CEST by the dblp team
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