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ORCIDFeng Han 0008
Person information
- affiliation: Nanjing University, Institute of VLSI Design, School of Electronic Science and Engineering, China
Other persons with the same name
- Feng Han — disambiguation page
- Feng Han 0001 — University of California, Los Angeles, CA, USA
- Feng Han 0002 — Sarnoff Corporation, Princeton, NJ, USA
- Feng Han 0003 — University of Maryland, Department of Electrical and Computer Engineering, College Park, MD, USA
- Feng Han 0004
![[0000-0003-0911-9385]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-0911-9385")
— Hong Kong University of Science and Technology, Hong Kong - Feng Han 0005 — Xiamen University, Institute of Electromagnetics and Acoustics, Department of Electronic Science, China (and 1 more)
- Feng Han 0006 — Zhengzhou University of Light Industry, School of Electrics and Information Engineering, China
- Feng Han 0007 — Xi'an Jiaotong University, School of Mechanical Engineering, China
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Journal Articles
- 2017
[j6]Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Jin Sha, Jun Lin:
An access pattern based adaptive mapping function for GPGPU scratchpad memory. IEICE Electron. Express 14(12): 20170373 (2017)- [j5]Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin, Yuxiang Fu, Jin Sha:
Optimized sorting network for successive cancellation list decoding of polar codes. IEICE Electron. Express 14(18): 20170735 (2017) - 2016
- [j4]Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Baoning Zhang, Guoqiang He, Jun Lin:
An ultra-long FFT architecture implemented in a reconfigurable application specified processor. IEICE Electron. Express 13(13): 20160504 (2016) - [j3]Kun Wang, Li Li, Feng Han, Fan Feng, Jun Lin:
Design and implementation of high performance matrix inversion based on reconfigurable processor. IEICE Electron. Express 13(15): 20160579 (2016) - [j2]Fan Feng, Li Li, Kun Wang, Feng Han, Baoning Zhang, Guoqiang He:
Floating-point operation based reconfigurable architecture for radar processing. IEICE Electron. Express 13(21): 20160893 (2016) - 2014
- [j1]Yuang Zhang, Li Li, Zhonghai Lu, Axel Jantsch, Minglun Gao, Hongbing Pan, Feng Han:
A survey of memory architecture for 3D chip multi-processors. Microprocess. Microsystems 38(5): 415-430 (2014)
Conference and Workshop Papers
- 2017
- [c5]Fan Feng, Li Li, Kun Wang, Feng Han, Hongbing Pan, Wei Li:
Application space exploration of a multi-fabric reconfigurable system. ASICON 2017: 287-290 - 2016
- [c4]Yuxiang Fu, Li Li, Hongbing Pan, Kun Wang, Feng Han, Jun Lin:
Accurate runtime thermal prediction scheme for 3D NoC systems with noisy thermal sensors. ISCAS 2016: 1198-1201 - 2015
- [c3]Kun Wang, Li Li, Feng Han, Hongbing Pan, Fan Feng, Xiao Yu:
A high performance parallel VLSI design of matrix inversion. ASICON 2015: 1-4 - [c2]Yuxiang Fu, Li Li, Yuang Zhang, Hongbing Pan, Feng Han, Kun Wang:
Lateral asynchronous and vertical synchronous 3D Network on Chip with double pumped vertical links. ASICON 2015: 1-4 - [c1]Feng Han, Li Li, Kun Wang, Fan Feng, Hongbing Pan, Dong Yu:
An improved FFT architecture optimized for reconfigurable application specified processor. ASICON 2015: 1-4
Coauthor Index
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