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Shouhei Nomoto
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2010 – 2019
- 2012
- [c6]Hanno Lieske, Shorin Kyo, Shouhei Nomoto, Sunao Torii, Yuki Kobayashi, Yasuyuki Ninomiya, Shin'ichiro Okazaki:
Efficient data transfer operations for a SIMD processor array system. ICASSP 2012: 1625-1628 - 2011
- [c5]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
A dynamic SIMD/MIMD mode switching processor for embedded real-time image recognition systems. A-SSCC 2011: 17-20 - 2010
- [j2]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application. Inf. Media Technol. 5(2): 366-375 (2010) - [j1]Shouhei Nomoto, Shorin Kyo, Shin'ichiro Okazaki:
Performance Evaluation of a Dynamically Switchable SIMD/MIMD Processor by Using an Image Recognition Application. IPSJ Trans. Syst. LSI Des. Methodol. 3: 47-56 (2010)
2000 – 2009
- 2009
- [c4]Shorin Kyo, Shouhei Nomoto, Takuya Koga, Hanno Lieske, Shin'ichiro Okazaki:
IMAPCAR2: A dynamic SIMD/MIMD mode switching processor for embedded systems. Hot Chips Symposium 2009: 1-33 - [c3]Shorin Kyo, Shouhei Nomoto, Shin'ichiro Okazaki:
Mapping schemes of image recognition tasks onto highly parallel SIMD/MIMD processors. ICDSC 2009: 1-6 - 2007
- [c2]Shorin Kyo, Takuya Koga, Hanno Lieske, Shouhei Nomoto, Shin'ichiro Okazaki:
A low-cost mixed-mode parallel processor architecture for embedded systems. ICS 2007: 253-262 - 2004
- [c1]Shinya Ito, Shouhei Nomoto, Hiroshi Tomiyasu, Hiroaki Nishikawa:
The Microarchitecture of the CUE-v2 Processor: Enabling the Simultaneous Processing of Dataflow and Control-Flow Threads. PDPTA 2004: 525-531
Coauthor Index
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