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ORCIDStefan Joeres
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2000 – 2009
- 2009
[j4]Song-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
A 2.7 mW, 90.3 dB DR Continuous-Time Quadrature Bandpass Sigma-Delta Modulator for GSM/EDGE Low-IF Receiver in 0.25 µm CMOS. IEEE J. Solid State Circuits 44(3): 891-900 (2009)- [j3]Yifan Wang, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Modeling Approaches for Functional Verification of RF-SoCs: Limits and Future Requirements. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28(5): 769-773 (2009) - 2008
- [j2]Song-Bok Kim, Tobias D. Werth, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Effect of Mismatched Loop Delay in Continuous-Time Complex Sigma-Delta Modulators. IEEE Trans. Circuits Syst. II Express Briefs 55-II(10): 996-1000 (2008) - [j1]Song-Bok Kim, Markus Robens, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
A Polyphase Filter Design for Continuous-Time Quadrature Bandpass Sigma-Delta Modulators. IEEE Trans. Circuits Syst. I Regul. Pap. 55-I(11): 3457-3468 (2008) - [c5]Yifan Wang, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Issues on View Switching for RF SoC Verification. BMAS 2008: 72-77 - [c4]Song-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Complex mismatch shaper for tree-structured DAC in multi-bit complex sigma-delta modulators. ICECS 2008: 328-331 - [c3]Song-Bok Kim, Stefan Joeres, Ralf Wunderlich, Stefan Heinen:
Continuous-time quadrature bandpass sigma-delta modulator with capacitive feedforward summation for GSM/EDGE low-IF receiver. ICECS 2008: 438-441 - 2007
- [c2]Song-Bok Kim, Stefan Joeres, Stefan Heinen:
A compensation method of the excess loop delay in continuous-time complex sigma-delta modulators. ECCTD 2007: 140-143 - [c1]Stefan Joeres, Song-Bok Kim, Stefan Heinen:
Simulation of quadrature-bandpass Sigma-Delta analog to digital converters using state space descriptions. ECCTD 2007: 886-889
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