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2010 – 2019
- 2012
[c10]Chin-Cheng Kuo, Wei-Yi Hu, Yi-Hung Chen, Jui-Feng Kuan, Yi-Kan Cheng:
Efficient trimmed-sample Monte Carlo methodology and yield-aware design flow for analog circuits. DAC 2012: 1113-1118- [c9]Po-Cheng Pan, Hung-Ming Chen, Yi-Kan Cheng, Jill Liu, Wei-Yi Hu:
Configurable analog routing methodology via technology and design constraint unification. ICCAD 2012: 620-626
2000 – 2009
- 2007
- [c8]Subarna Sinha, Qing Su, Linni Wen, Frank Lee, Charles C. Chiang, Yi-Kan Cheng, Jin-Lien Lin, Yu-Chyi Harn:
A New Flexible Algorithm for Random Yield Improvement. ISQED 2007: 795-800 - 2000
- [j3]Yi-Kan Cheng, Sung-Mo Kang:
A temperature-aware simulation environment for reliable ULSI chipdesign. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19(10): 1211-1220 (2000) - [c7]Yi-Kan Cheng, David Bearden, Kanti Suryadevara:
Application-Based, Transistor-Level Full-Chip Power Analysis for 700 MHz PowerPCTM Microprocessor. ICCD 2000: 215-220
1990 – 1999
- 1999
- [c6]Yi-Kan Cheng, Sung-Mo Kang:
An efficient method for hot-spot identification in ULSI circuits. ICCAD 1999: 124-127 - [c5]Yi-Kan Cheng, Sung-Mo Kang:
Temperature-driven power and timing analysis for CMOS ULSI circuits. ISCAS (6) 1999: 214-217 - 1998
- [j2]Yi-Kan Cheng, Prasun Raha, Chin-Chi Teng, Elyse Rosenbaum, Sung-Mo Kang:
ILLIADS-T: an electrothermal timing simulator for temperature-sensitive reliability diagnosis of CMOS VLSI chips. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17(8): 668-681 (1998) - 1997
- [b1]Yi-Kan Cheng:
Electrothermal Simulation and Temperature-Sensitive Reliability Diagnosis for CMOS VLSI Circuits. University of Illinois Urbana-Champaign, USA, 1997 - [j1]Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang:
iTEM: a temperature-dependent electromigration reliability diagnosis tool. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16(8): 882-893 (1997) - 1996
- [c4]Yi-Kan Cheng, Chin-Chi Teng, Abhijit Dharchoudhury, Elyse Rosenbaum, Sung-Mo Kang:
iCET: A Complete Chip-Level Thermal Reliability Diagnosis Tool for CMOS VLSI Chips. DAC 1996: 548-551 - [c3]Chin-Chi Teng, Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang:
Hierarchical Electromigration Reliability Diagnosis for VLSI Interconnects. DAC 1996: 752-757 - [c2]Yi-Kan Cheng, Elyse Rosenbaum, Sung-Mo Kang:
ETS-A: A New Electrothermal Simulator for CMOS VLSI Circuits. ED&TC 1996: 566-570 - 1995
- [c1]Yi-Kan Cheng, Sung-Mo Kang:
Chip-Level Thermal Simulator to Predict VLSI Chip Temperature. ISCAS 1995: 1392-1395
Coauthor Index
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