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Fran Hanchek

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Journal Articles

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1998
[j2]
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Fran Hanchek, Shantanu Dutt:
Methodologies for Tolerating Cell and Interconnect Faults in FPGAs. IEEE Trans. Computers 47(1): 15-33 (1998)
1997
[j1]
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Shantanu Dutt, Fran Hanchek:
REMOD: a new methodology for designing fault-tolerant arithmetic circuits. IEEE Trans. Very Large Scale Integr. Syst. 5(1): 34-56 (1997)

Conference and Workshop Papers

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1996
[c1]
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Fran Hanchek, Shantanu Dutt:
Node-Covering Based Defect and Fault Tolerance Methods for Increased Yield in FPGAs. VLSI Design 1996: 225-229

Coauthor Index

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