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Makoto Endo
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2000 – 2009
- 2007
- [j8]Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Toshihiro Minami, Makoto Endo, Yoshiyuki Yashima:
Single-Chip MPEG-2 422P@HL CODEC LSI With Multichip Configuration for Large Scale Processing Beyond HDTV Level. IEEE Trans. Very Large Scale Integr. Syst. 15(9): 1055-1059 (2007) - 2006
- [j7]Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima:
Highly accurate de-jittering scheme for broadcast quality video transmission. Syst. Comput. Jpn. 37(10): 81-88 (2006) - 2005
- [j6]Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima:
MPEG-2 real-time software CODEC for full-duplex transmission application over IP networks. Syst. Comput. Jpn. 36(2): 33-41 (2005) - 2004
- [c9]Takayuki Onishi, Mitsuo Ikeda, Jiro Naganuma, Makoto Endo, Yoshiyuki Yashima:
A distributed TS-MUX architecture for multi-chip extension beyond the HDTV level. ISCAS (2) 2004: 261-264 - 2003
- [c8]Hiroe Iwasaki, Jiro Naganuma, Yasuyuki Nakajima, Yutaka Tashiro, Ken Nakamura, Takeshi Yoshitome, Takayuki Onishi, Mitsuo Ikeda, Takaaki Izuoka, Makoto Endo:
A 1.1 W single-chip MPEG-2 HDTV codec LSI for embedding in consumer-oriented mobile codec systems. CICC 2003: 177-180 - [c7]Hiroe Iwasaki, Jiro Naganuma, Koyo Nitta, Ken Nakamura, Takeshi Yoshitome, Mitsuo Ogura, Yasuyuki Nakajima, Yutaka Tashiro, Takayuki Onishi, Mitsuo Ikeda, Makoto Endo:
Single-Chip MPEG-2 422P@HL CODEC LSI with Multi-Chip Configuration for Large Scale Processing beyond HDTV Level. DATE 2003: 20002-20007 - [c6]Takeshi Yoshitome, Ken Nakamura, Yoshiyuki Yashima, Makoto Endo:
Scalable architecture for use in an over-HDTV real-time codec system for multiresolution video. VCIP 2003: 1752-1759 - 2002
- [j5]Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Takeshi Ogura:
Advanced concurrent design environment for multimedia system LSIs. Syst. Comput. Jpn. 33(14): 72-80 (2002)
1990 – 1999
- 1999
- [j4]Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi, Tsuneo Okubo, Ryota Kasai:
SuperENC: MPEG-2 video encoder chip. IEEE Micro 19(4): 56-65 (1999) - [j3]Minoru Inamori, Jiro Naganuma, Makoto Endo:
A memory-based architecture for MPEG2 system protocol LSIs. IEEE Trans. Very Large Scale Integr. Syst. 7(3): 339-344 (1999) - [c5]Katsuyuki Ochiai, Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura:
High-speed Software-based Platform for Embedded Software of a Single-chip MPEG-2 Video Encoder LSI with HDTV Scalabilit. DATE 1999: 303-308 - [c4]Hiroe Iwasaki, Jiro Naganuma, Makoto Endo, Takeshi Ogura:
On-Chip Multimedia Real-Time OS and its MPEG-2 Applications. RTCSA 1999: 200-203 - 1996
- [c3]Minoru Inamori, Jiro Naganuma, Haruo Wakabayashi, Makoto Endo:
A Memory-based Architecture for MPEG2 System Protocol LSIs. ED&TC 1996: 500-507 - 1990
- [c2]Toshiaki Miyazaki, Tamio Hoshino, Makoto Endo:
A CAD Process Scheduling Technique. ICCAD 1990: 354-357
1980 – 1989
- 1989
- [c1]Makoto Endo:
The Roles of Logic Synthesis Systems. IFIP Congress 1989: 529 - 1985
- [j2]Osamu Karatsu, Tamio Hoshino, Makoto Endo, Hitoshi Kitazawa, Tohru Adachi, Kazuhiro Ueda:
An Integrated Design Automation System for VLSI Circuits. IEEE Des. Test 2(5): 17-26 (1985) - 1983
- [j1]Takashi Watanabe, Makoto Endo, Norio Miyahara:
A New Automatic Logic Interconnection Verification System for VLSI Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2(2): 70-82 (1983)
Coauthor Index
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