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ORCIDSomayeh Sadeghi Kohan
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2020 – today
- 2024
[j4]Somayeh Sadeghi Kohan
, Sybille Hellebrand, Hans-Joachim Wunderlich:
Workload-Aware Periodic Interconnect BIST. IEEE Des. Test 41(4): 50-55 (2024)- 2023
- [c15]Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand, Hans-Joachim Wunderlich:
Optimizing the Streaming of Sensor Data with Approximate Communication. ATS 2023: 1-6 - [c14]Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich:
Low Power Streaming of Sensor Data Using Gray Code-Based Approximate Communication. DSN-W 2023: 203-206 - [c13]Abdalrhman Badran, Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand:
Approximate Communication: Balancing Performance, Power, Reliability, and Safety. ETS 2023: 1-6 - 2021
- [j3]Somayeh Sadeghi Kohan, Sybille Hellebrand, Hans-Joachim Wunderlich:
Stress-Aware Periodic Test of Interconnects. J. Electron. Test. 37(5): 715-728 (2021) - 2020
- [j2]Somayeh Sadeghi Kohan, Mehdi Kamal, Zainalabedin Navabi:
Self-Adjusting Monitor for Measuring Aging Rate and Advancement. IEEE Trans. Emerg. Top. Comput. 8(3): 627-641 (2020) - [c12]Alexander Sprenger, Somayeh Sadeghi Kohan, Jan Dennis Reimer, Sybille Hellebrand:
Variation-Aware Test for Logic Interconnects using Neural Networks - A Case Study. DFT 2020: 1-6 - [c11]Somayeh Sadeghi Kohan, Sybille Hellebrand:
Dynamic Multi-Frequency Test Method for Hidden Interconnect Defects. VTS 2020: 1-6
2010 – 2019
- 2018
- [c10]Ramin Rezaeizadeh Rookerd, Somayeh Sadeghi Kohan, Zainalabedin Navabi:
Performance and Energy Enhancement through an Online Single/Multi Level Mode Switching Cache Architecture. ACM Great Lakes Symposium on VLSI 2018: 33-38 - [c9]Somayeh Sadeghi Kohan, Arash Vafaei, Zainalabedin Navabi:
Near-Optimal Node Selection Procedure for Aging Monitor Placement. IOLTS 2018: 6-11 - 2016
- [c8]Maksim Jenihhin, Alexander Kamkin, Zainalabedin Navabi, Somayeh Sadeghi Kohan:
Universal mitigation of NBTI-induced aging by design randomization. EWDTS 2016: 1-5 - 2015
- [j1]Bijan Alizadeh, Payman Behnam, Somayeh Sadeghi Kohan:
A Scalable Formal Debugging Approach with Auto-Correction Capability Based on Static Slicing and Dynamic Ranking for RTL Datapath Designs. IEEE Trans. Computers 64(6): 1564-1578 (2015) - [c7]Somayeh Sadeghi Kohan, Mehdi Kamal, John McNeil, Paolo Prinetto, Zain Navabi:
Online self adjusting progressive age monitoring of timing variations. DTIS 2015: 1-2 - [c6]Somayeh Sadeghi Kohan, Arezoo Kamran, Farnaz Forooghifar, Zainalabedin Navabi:
Aging in digital circuits and age monitoring: Object-oriented modeling and evaluation. DTIS 2015: 1-6 - 2014
- [c5]Somayeh Sadeghi Kohan, Payman Behnam, Bijan Alizadeh, Masahiro Fujita, Zainalabedin Navabi:
Improving polynomial datapath debugging with HEDs. ETS 2014: 1-6 - [c4]Marzieh Mohammadi, Somayeh Sadeghi Kohan, Nasser Masoumi, Zainalabedin Navabi:
An off-line MDSI interconnect BIST incorporated in BS 1149.1. ETS 2014: 1-2 - 2013
- [c3]Somayeh Sadeghi Kohan, Shahrzad Keshavarz, Farzaneh Zokaee, Farimah Farahmandi, Zainalabedin Navabi:
A new structure for interconnect offline testing. EWDTS 2013: 1-5 - 2012
- [c2]Somayeh Sadeghi Kohan, Majid Namaki-Shoushtari, Fatemeh Javaheri, Zainalabedin Navabi:
BS 1149.1 extensions for an online interconnect fault detection and recovery. ITC 2012: 1-9 - 2010
- [c1]Arezoo Kamran, Nastaran Nemati, Somayeh Sadeghi Kohan, Zainalabedin Navabi:
Virtual tester development using HDL/PLI. EWDTS 2010: 412-415
Coauthor Index
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