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2010 – 2019
- 2015
[j5]Heather M. Quinn, Diane Roussel-Dupre, Michael P. Caffrey, Paul S. Graham, Michael J. Wirthlin, Keith Morgan
, Anthony Salazar, Tony Nelson, William Howes, Darrel Eric Johnson, Jonathan M. Johnson, Brian H. Pratt, Nathan Rollins, Jim Krone:
The Cibola Flight Experiment. ACM Trans. Reconfigurable Technol. Syst. 8(1): 3:1-3:22 (2015)- 2010
- [j4]Zachary K. Baker, Mark E. Dunham, Keith Morgan, Michael Pigue, Matthew Stettler, Paul S. Graham, Eric N. Schmierer, John Power:
Space-Based FPGA Radio Receiver Design, Debug, and Development of a Radiation-Tolerant Computing System. Int. J. Reconfigurable Comput. 2010: 546217:1-546217:12 (2010)
2000 – 2009
- 2009
- [j3]Heather M. Quinn, Paul S. Graham, Michael J. Wirthlin, Brian H. Pratt, Keith Morgan, Michael P. Caffrey, Jim Krone:
A Test Methodology for Determining Space Readiness of Xilinx SRAM-Based FPGA Devices and Designs. IEEE Trans. Instrum. Meas. 58(10): 3380-3395 (2009) - [c21]Brian H. Pratt, Michael J. Wirthlin, Michael P. Caffrey, Paul S. Graham, Keith Morgan:
Noise impact of single-event upsets on an FPGA-based digital filter. FPL 2009: 38-43 - [c20]Mark E. Dunham, Zachary K. Baker, Matthew Stettler, Michael Pigue, Paul S. Graham, Eric N. Schmierer, John Power:
High Efficiency Space-Based Software Radio Architectures: A Minimum Size, Weight, and Power TeraOps Processor. ReConFig 2009: 326-331 - 2008
- [c19]Heather Quinn, Paul S. Graham, Keith Morgan, Jim Krone, Michael P. Caffrey, Michael J. Wirthlin:
An Introduction to Radiation-Induced Failure Modes and Related Mitigation Methods For Xilinx SRAM FPGAs. ERSA 2008: 139-145 - [c18]Brian H. Pratt, Michael P. Caffrey, Derrick Gibelyou, Paul S. Graham, Keith Morgan, Michael J. Wirthlin:
TMR with More Frequent Voting for Improved FPGA Reliability. ERSA 2008: 153-158 - 2007
- [j2]Debayan Bhaduri, Sandeep K. Shukla, Paul S. Graham, Maya B. Gokhale:
Reliability Analysis of Large Circuits Using Scalable Techniques and Tools. IEEE Trans. Circuits Syst. I Regul. Pap. 54-I(11): 2447-2460 (2007) - [c17]Debayan Bhaduri, Sandeep K. Shukla, Paul S. Graham, Maya B. Gokhale:
Scalable techniques and tools for reliability analysis of large circuits. VLSI Design 2007: 705-710 - 2006
- [j1]Maya B. Gokhale, Paul S. Graham, Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins:
Dynamic reconfiguration for management of radiation-induced faults in FPGAs. Int. J. Embed. Syst. 2(1/2): 28-38 (2006) - [c16]Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Valerie E. Taylor, Paul S. Graham, Maya B. Gokhale:
A hybrid framework for design and analysis of fault-tolerant architectures. DATE 2006: 335-336 - [c15]Heather Quinn, Debayan Bhaduri, Christof Teuscher, Paul S. Graham, Maya B. Gokhale:
The STAR-C Truth: Analyzing Reconfigurable Supercomputing Reliability. FCCM 2006: 323-324 - 2005
- [c14]Heather Quinn, Paul S. Graham:
Terrestrial-Based Radiation Upsets: A Cautionary Tale. FCCM 2005: 193-202 - 2004
- [c13]Maya B. Gokhale, Paul S. Graham, Darrel Eric Johnson, Nathan Rollins, Michael J. Wirthlin:
Dynamic Reconfiguration for Management of Radiation-Induced Faults in FPGAs. IPDPS 2004 - 2003
- [c12]Michael J. Wirthlin, Darrel Eric Johnson, Nathan Rollins, Michael P. Caffrey, Paul S. Graham:
The Reliability of FPGA Circuit Designs in the Presence of Radiation Induced Configuration Upsets. FCCM 2003: 133-142 - [c11]Mark E. Dunham, Michael P. Caffrey, Paul S. Graham:
Challenges and Successes in Space Based Reconfigurable Computing. FPL 2003: 948-951 - 2001
- [c10]Paul S. Graham, Brent E. Nelson, Brad L. Hutchings:
Instrumenting Bitstreams for Debugging FPGA Circuits. FCCM 2001: 41-50 - [c9]Timothy Wheeler, Paul S. Graham, Brent E. Nelson, Brad L. Hutchings:
Using Design-Level Scan to Improve FPGA Design Observability and Controllability for Functional Verification. FPL 2001: 483-492 - 2000
- [c8]Michael J. Wirthlin, Steve Morrison, Paul S. Graham, Brian Bray:
Improving the Performance and Efficiency of an Adaptive Amplification Operation Using Configurable Hardware. FCCM 2000: 267-278 - [c7]Paul S. Graham, Brad L. Hutchings, Brent E. Nelson:
Improving the FPGA Design Process through Determining and Applying Logical-to-Physical Design Mappings. FCCM 2000: 305-306 - [c6]Michael J. Wirthlin, Paul S. Graham:
Improving the performance and efficiency of an adaptive amplification operation using configurable hardware (poster abstract). FPGA 2000: 219
1990 – 1999
- 1999
- [c5]Paul S. Graham, Brent E. Nelson:
Reconfigurable Processors for High-Performance, Embedded Digital Signal Processing. FPL 1999: 1-10 - 1998
- [c4]Paul S. Graham, Brent E. Nelson:
Frequency-Domain Sonar Processing in FPGAs and DSPs. FCCM 1998: 306-307 - [c3]Paul S. Graham, Brent E. Nelson:
FPGA-Based Sonar Processing. FPGA 1998: 201-208 - 1996
- [c2]Paul S. Graham, Brent E. Nelson:
Genetic algorithms in software and in hardware-a performance analysis of workstation and custom computing machine implementations. FCCM 1996: 216-225 - 1995
- [c1]Paul S. Graham, Brent E. Nelson:
A Hardware Genetic Algorithm for the Travelling Salesman Problem on SPLASH 2. FPL 1995: 352-361
Coauthor Index
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