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ORCIDMihail Asavoae
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2020 – today
- 2024
[j7]Simon Tollec, Vedad Hadzic, Pascal Nasahl, Mihail Asavoae, Roderick Bloem, Damien Couroussé, Karine Heydemann, Mathieu Jan, Stefan Mangard:
Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults. IACR Trans. Cryptogr. Hardw. Embed. Syst. 2024(4): 179-204 (2024)- [c27]Felipe Lisboa Malaquias
, Mihail Asavoae, Florian Brandner:
Leveraging Reusable Code and Proofs to Design Complex DRAM Controllers - A Case Study. DSD 2024: 298-305 - [i3]Simon Tollec, Vedad Hadzic, Pascal Nasahl, Mihail Asavoae, Roderick Bloem, Damien Couroussé, Karine Heydemann, Mathieu Jan, Stefan Mangard:
Fault-Resistant Partitioning of Secure CPUs for System Co-Verification against Faults. IACR Cryptol. ePrint Arch. 2024: 247 (2024) - 2023
- [j6]Felipe Lisboa Malaquias, Mihail Asavoae, Florian Brandner:
A formal framework to design and prove trustworthy memory controllers. Real Time Syst. 59(4): 664-704 (2023) - [c26]Simon Tollec, Mihail Asavoae, Damien Couroussé, Karine Heydemann, Mathieu Jan:
μARCHIFI: Formal Modeling and Verification Strategies for Microarchitectural Fault Injections. FMCAD 2023: 101-109 - [c25]Felipe Lisboa Malaquias, Mihail Asavoae, Florian Brandner:
From the Standards to Silicon: Formally Proved Memory Controllers. NFM 2023: 295-311 - 2022
- [j5]Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan:
Formal modeling and verification for amplification timing anomalies in the superscalar TriCore architecture. Int. J. Softw. Tools Technol. Transf. 24(3): 415-440 (2022) - [c24]Simon Tollec, Mihail Asavoae, Damien Couroussé, Karine Heydemann, Mathieu Jan:
Exploration of Fault Effects on Formal RISC-V Microarchitecture Models. FDTC 2022: 73-83 - [c23]Mihail Asavoae, Oumaima Matoussi, Asmae Bouachtala, Hai-Dang Vu, Mathieu Jan:
A memory interference analysis using a formal timing analyzer (WIP). LCTES 2022: 146-150 - [c22]Samira Ait Bensaid, Mihail Asavoae, Farhat Thabet, Mathieu Jan:
Deriving Pipeline Models for Timing Analysis from High-Level HDL Processor Designs. MEMOCODE 2022: 1-8 - [c21]Samira Ait Bensaid, Mihail Asavoae, Farhat Thabet, Mathieu Jan:
Work in Progress: Automatic Construction of Pipeline Datapaths from High-Level HDL Code. RTAS 2022: 305-308 - [c20]Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan:
The Role of Causality in a Formal Definition of Timing Anomalies. RTCSA 2022: 91-102 - [c19]Felipe Lisboa Malaquias, Mihail Asavoae, Florian Brandner:
A Coq Framework for More Trustworthy DRAM Controllers. RTNS 2022: 140-150 - 2021
- [c18]Benjamin Binder, Mihail Asavoae, Belgacem Ben Hedia, Florian Brandner, Mathieu Jan:
Is This Still Normal? Putting Definitions of Timing Anomalies to the Test. RTCSA 2021: 139-148 - 2020
- [c17]Mathieu Jan, Mihail Asavoae, Martin Schoeberl, Edward A. Lee:
Formal Semantics of Predictable Pipelines: a Comparative Study. ASP-DAC 2020: 103-108 - [c16]Benjamin Binder, Mihail Asavoae, Florian Brandner, Belgacem Ben Hedia, Mathieu Jan:
Scalable Detection of Amplification Timing Anomalies for the Superscalar TriCore Architecture. FMICS 2020: 151-169
2010 – 2019
- 2019
- [j4]Pascal Raymond, Claire Maiza, Catherine Parent-Vigouroux, Erwan Jahier, Nicolas Halbwachs, Fabienne Carrier, Mihail Asavoae, Rémy Boutonnet:
Improving WCET Evaluation using Linear Relation Analysis. Leibniz Trans. Embed. Syst. 6(1): 02:1-02:28 (2019) - [c15]Mihail Asavoae, Imane Haur, Mathieu Jan, Belgacem Ben Hedia, Martin Schoeberl:
Towards Formal Co-validation of Hardware and Software Timing Models of CPSs. CyPhy/WESE 2019: 203-227 - 2018
- [j3]Irina Mariuca Asavoae, Mihail Asavoae, Adrián Riesco:
Slicing from formal semantics: Chisel - a tool for generic program slicing. Int. J. Softw. Tools Technol. Transf. 20(6): 739-769 (2018) - [c14]Irina Mariuca Asavoae, Mihail Asavoae, Adrián Riesco:
Context-Updates Analysis and Refinement in Chisel. SPIN 2018: 328-346 - [c13]Mihail Asavoae, Belgacem Ben Hedia, Mathieu Jan:
Formal Executable Models for Automatic Detection of Timing Anomalies. WCET 2018: 2:1-2:13 - 2017
- [j2]Cristian Maxim, Adriana Gogonel, Irina Mariuca Asavoae, Mihail Asavoae, Liliana Cucu-Grosjean:
Reproducibility and representativity: mandatory properties for the compositionality of measurement-based WCET estimation approaches. SIGBED Rev. 14(3): 24-31 (2017) - [c12]Adrián Riesco, Irina Mariuca Asavoae, Mihail Asavoae:
Slicing from Formal Semantics: Chisel. FASE 2017: 374-378 - [i2]Irina Mariuca Asavoae, Mihail Asavoae, Adrián Riesco:
Context-Updates Analysis and Refinement in Chisel. CoRR abs/1709.06897 (2017) - 2015
- [j1]Pascal Raymond, Claire Maiza, Catherine Parent-Vigouroux, Fabienne Carrier, Mihail Asavoae:
Timing analysis enhancement for synchronous program. Real Time Syst. 51(2): 192-220 (2015) - [c11]Adrián Riesco, Irina Mariuca Asavoae, Mihail Asavoae:
Memory Policy Analysis for Semantics Specifications in Maude. LOPSTR 2015: 293-310 - 2014
- [c10]Irina Mariuca Asavoae, Mihail Asavoae, Adrián Riesco:
Towards a Formal Semantics-Based Technique for Interprocedural Slicing. IFM 2014: 291-306 - [c9]Julien Henry, Mihail Asavoae, David Monniaux, Claire Maiza:
How to compute worst-case execution time by optimization modulo theory and a clever encoding of program semantics. LCTES 2014: 43-52 - [i1]Julien Henry, Mihail Asavoae, David Monniaux, Claire Maïza:
How to Compute Worst-Case Execution Time by Optimization Modulo Theory and a Clever Encoding of Program Semantics. CoRR abs/1405.7962 (2014) - 2013
- [c8]Mihail Asavoae, Irina Mariuca Asavoae:
On the Modular Integration of Abstract Semantics for WCET Analysis. FOPARA 2013: 19-37 - [c7]Mihail Asavoae, Claire Maiza, Pascal Raymond:
Program Semantics in Model-Based WCET Analysis: A State of the Art Perspective. WCET 2013: 32-41 - 2012
- [c6]Adrián Riesco, Irina Mariuca Asavoae, Mihail Asavoae:
A Generic Program Slicing Technique Based on Language Definitions. WADT 2012: 248-264 - 2011
- [c5]Mihail Asavoae, Irina Mariuca Asavoae, Dorel Lucanu:
On Abstractions for Timing Analysis in the $\mathbb{K}$ Framework. FOPARA 2011: 90-107 - [c4]Mihail Asavoae, Irina Mariuca Asavoae:
Using the Executable Semantics for CFG Extraction and Unfolding. SYNASC 2011: 123-127 - [c3]Mihail Asavoae:
K Semantics for Assembly Languages: A Case Study. K 2011: 111-125 - 2010
- [c2]Irina Mariuca Asavoae, Mihail Asavoae, Dorel Lucanu:
Path Directed Symbolic Execution in the K Framework. SYNASC 2010: 133-141 - [c1]Irina Mariuca Asavoae, Mihail Asavoae:
Collecting Semantics under Predicate Abstraction in the K Framework. WRLA 2010: 123-139
Coauthor Index
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