default search action
Google
Google Scholar
Semantic Scholar
Internet Archive Scholar
CiteSeerX
ORCIDMehul Tikekar
Person information
Refine list
refinements active!
zoomed in on ?? of ?? records
view refined list in
export refined list as
2020 – today
- 2020
[i1]Albert Gural, Phillip M. Nadeau, Mehul Tikekar, Boris Murmann:
Low-Rank Training of Deep Neural Networks for Emerging Memory Technology. CoRR abs/2009.03887 (2020)
2010 – 2019
- 2018
- [j5]Mehul Tikekar, Vivienne Sze
, Anantha P. Chandrakasan:
A Fully Integrated Energy-Efficient H.265/HEVC Decoder With eDRAM for Wearable Devices. IEEE J. Solid State Circuits 53(8): 2368-2377 (2018) - 2017
- [b1]Mehul Tikekar:
Energy-efficient video decoding using data statistics. Massachusetts Institute of Technology, Cambridge, USA, 2017 - [j4]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An Energy-Scalable Accelerator for Blind Image Deblurring. IEEE J. Solid State Circuits 52(7): 1849-1862 (2017) - 2016
- [c5]Priyanka Raina, Mehul Tikekar, Anantha P. Chandrakasan:
An energy-scalable accelerator for blind image deblurring. ESSCIRC 2016: 113-116 - 2014
- [j3]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249-Mpixel/s HEVC Video-Decoder Chip for 4K Ultra-HD Applications. IEEE J. Solid State Circuits 49(1): 61-72 (2014) - [j2]Chao-Tsung Huang, Mehul Tikekar, Anantha P. Chandrakasan:
Memory-Hierarchical and Mode-Adaptive HEVC Intra Prediction Architecture for Quad Full HD Video Decoding. IEEE Trans. Very Large Scale Integr. Syst. 22(7): 1515-1525 (2014) - [c4]Mehul Tikekar, Chao-Tsung Huang, Vivienne Sze, Anantha P. Chandrakasan:
Energy and area-efficient hardware implementation of HEVC inverse transform and dequantization. ICIP 2014: 2100-2104 - [p1]Mehul Tikekar, Chao-Tsung Huang, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
Decoder Hardware Architecture for HEVC. High Efficiency Video Coding 2014: 303-341 - 2013
- [j1]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Technique for Efficient Evaluation of SRAM Timing Failure. IEEE Trans. Very Large Scale Integr. Syst. 21(8): 1558-1562 (2013) - [c3]Chao-Tsung Huang, Mehul Tikekar, Chiraag Juvekar, Vivienne Sze, Anantha P. Chandrakasan:
A 249Mpixel/s HEVC video-decoder chip for Quad Full HD applications. ISSCC 2013: 162-163 - [c2]Chao-Tsung Huang, Chiraag Juvekar, Mehul Tikekar, Anantha P. Chandrakasan:
HEVC interpolation filter architecture for quad full HD decoding. VCIP 2013: 1-5 - 2010
- [c1]Masood Qazi, Mehul Tikekar, Lara Dolecek, Devavrat Shah, Anantha P. Chandrakasan:
Loop flattening & spherical sampling: Highly efficient model reduction techniques for SRAM yield analysis. DATE 2010: 801-806
Coauthor Index
manage site settings
To protect your privacy, all features that rely on external API calls from your browser are turned off by default. You need to opt-in for them to become active. All settings here will be stored as cookies with your web browser. For more information see our F.A.Q.
Unpaywalled article links
Add open access links from 
to the list of external document links (if available).
Privacy notice: By enabling the option above, your browser will contact the API of unpaywall.org to load hyperlinks to open access articles. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Unpaywall privacy policy.
Archived links via Wayback Machine
For web page which are no longer available, try to retrieve content from the 
of the Internet Archive (if available).
Privacy notice: By enabling the option above, your browser will contact the API of archive.org to check for archived content of web pages that are no longer available. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Internet Archive privacy policy.
Reference lists
Add a list of references from 
, 
, and 
to record detail pages.
load references from crossref.org and opencitations.net
Privacy notice: By enabling the option above, your browser will contact the APIs of crossref.org, opencitations.net, and semanticscholar.org to load article reference information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the Crossref privacy policy and the OpenCitations privacy policy, as well as the AI2 Privacy Policy covering Semantic Scholar.
Citation data
Add a list of citing articles from and to record detail pages.
load citations from opencitations.net
Privacy notice: By enabling the option above, your browser will contact the API of opencitations.net and semanticscholar.org to load citation information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the OpenCitations privacy policy as well as the AI2 Privacy Policy covering Semantic Scholar.
OpenAlex data
Load additional information about publications from 
.
Privacy notice: By enabling the option above, your browser will contact the API of openalex.org to load additional information. Although we do not have any reason to believe that your call will be tracked, we do not have any control over how the remote server uses your data. So please proceed with care and consider checking the information given by OpenAlex.
last updated on 2024-04-24 23:05 CEST by the dblp team
all metadata released as open data under CC0 1.0 license
see also: Terms of Use | Privacy Policy | Imprint
dblp was originally created in 1993 at:
since 2018, dblp has been operated and maintained by:
the dblp computer science bibliography is funded and supported by:
