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Myung-Jun Choe
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2010 – 2019
- 2017
- [j5]Lucas Duncan, Brian Dupaix, Jamin J. McCue, Brandon Mathieu, Matthew LaRue, Vipul J. Patel, Mesfin Teshome, Myung-Jun Choe, Waleed Khalil:
A 10-bit DC-20-GHz Multiple-Return-to-Zero DAC With >48-dB SFDR. IEEE J. Solid State Circuits 52(12): 3262-3275 (2017) - [c6]Lucas Duncan, Brian Dupaix, Jamin J. McCue, Brandon Mathieu, Matthew LaRue, Mesfin Teshome, Myung-Jun Choe, Waleed Khalil:
16.6 A 10b DC-to-20GHz multiple-return-to-zero DAC with >48dB SFDR. ISSCC 2017: 286-287
2000 – 2009
- 2005
- [j4]Myung-Jun Choe, Kwang-Hyun Baek, Mesfin Teshome:
A 1.6-GS/s 12-bit return-to-zero GaAs RF DAC for multiple Nyquist operation. IEEE J. Solid State Circuits 40(12): 2456-2468 (2005) - [c5]Bo Hu, Zhao Li, Lili Zhou, Chuanjin Richard Shi, Kwang-Hyun Baek, Myung-Jun Choe:
Model-compiler based efficient statistical circuit analysis: an industry case study of a 4 GHz/6-bit ADC/DAC/DEMUX ASIC. ISCAS (6) 2005: 5621-5624 - 2003
- [c4]Edward Merlo, Kwang-Hyun Baek, Myung-Jun Choe:
Exponential split accumulator for high-speed reduced area low-power direct digital frequency synthesizers. ACM Great Lakes Symposium on VLSI 2003: 249-252 - [c3]Kwang-Hyun Baek, Myung-Jun Choe, Edward Merlo, Sung-Mo Kang:
1-GS/s, 12-bit SiGe BiCMOS D/A converter for high-speed DDFs. ISCAS (1) 2003: 901-904 - [c2]Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang:
An Efficient Calibration Technique for Systematic Current-Mismatch of D/A Converters. ISVLSI 2003: 80-86 - 2002
- [c1]Kwang-Hyun Baek, Myung-Jun Choe, Sung-Mo Kang:
A low-voltage high-speed BiCMOS current switch with enhanced-spectral performance. ISCAS (5) 2002: 53-56 - 2001
- [b1]Myung-Jun Choe:
High-Speed, Low-Spurious CMOS Analog -to -Digital Converter. University of Illinois Urbana-Champaign, USA, 2001 - [j3]Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania:
An 8-b 100-MSample/s CMOS pipelined folding ADC. IEEE J. Solid State Circuits 36(2): 184-194 (2001) - 2000
- [j2]Myung-Jun Choe, Bang-Sup Song, Kantilal Bacrania:
A 13-b 40-MSamples/s CMOS pipelined folding ADC with background offset trimming. IEEE J. Solid State Circuits 35(12): 1781-1790 (2000)
1990 – 1999
- 1999
- [j1]Jaejin Park, Eurho Joe, Myung-Jun Choe, Bang-Sup Song:
A 5-MHz IF digital FM demodulator. IEEE J. Solid State Circuits 34(1): 3-11 (1999)
Coauthor Index
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