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2020 – today
- 2024
[j14]Chengfei Qi, Xiaobo Yang, Xiaokun Yang, Chaoran Bi, Wenwen Li:
Research on Power Line Communication Based on Deep Learning for Electromechanical Equipment Electricity Acquisition Terminals. Scalable Comput. Pract. Exp. 25(5): 3366-3375 (2024)- 2023
- [c22]Mario Vega, Xiaokun Yang, John Shalf
, Doru-Thom Popovici:
Towards a Flexible Hardware Implementation for Mixed-Radix Fourier Transforms. HPEC 2023: 1-7 - [c21]Chanakya Hingu, Xingang Fu, Rajab Challoo, Jiang Lu, Xiaokun Yang, Letu Qingge:
Accelerating FPGA Implementation of Neural Network Controllers via 32-bit Fixed-Point Design for Real-Time Control. UEMCON 2023: 445-450 - 2022
- [j13]Daoheng Zhu, Daian Lu, Xiaokun Yang, Zhiqiang Li:
Key Technology of Mixed Matching Circuit for Miniaturizing Dual-Band Antenna. IEEE Access 10: 79348-79355 (2022) - [j12]Ruiming Yuan, Sida Zheng, Yan Liu, Fukuan Pang, Xiaokun Yang:
The Intelligent Detection Method of Electric Energy Meter Overload Operating and Collaborative Edge Computing for Social Internet of Things Systems. Int. J. Distributed Syst. Technol. 13(7): 1-21 (2022) - [c20]Guanyu Ding, Zhengxiong Li, Yusen Wu, Xiaokun Yang, Mehrdad Aliasgari, Hailu Xu:
Towards an Efficient Client Selection System for Federated Learning. CLOUD 2022: 13-21 - [c19]Caixia Xu, Xiaokun Yang, Zhipeng Wang, Pengyong Han, Xiaoguang Li, Zhengwei Li:
Research on the Potential Mechanism of Rhizoma Drynariae in the Treatment of Periodontitis Based on Network Pharmacology. ICIC (2) 2022: 207-219 - [c18]April L. Reed, Xiaokun Yang, Shi Sha:
Lightweight Neural Network Architectures for Resource-Limited Devices. ISQED 2022: 1-7 - 2021
- [j11]Xiaokun Yang, Shi Sha:
Exploiting Energy-Quality (E-Q) Tradeoffs: A Case Study on Color-to-Grayscale Converters with Approximate Design on FPGA. J. Circuits Syst. Comput. 30(4): 2150062:1-2150062:20 (2021) - [j10]Xiaokun Yang:
An Approach of Project-Based Learning: Bridging the Gap Between Academia and Industry Needs in Teaching Integrated Circuit Design Course. IEEE Trans. Educ. 64(4): 337-344 (2021) - [j9]Isaac Westby, Xiaokun Yang, Tao Liu, Hailu Xu:
FPGA acceleration on a multi-layer perceptron neural network for digit recognition. J. Supercomput. 77(12): 14356-14373 (2021) - [c17]Yinghao Liu, Xiaoman Wang, Xiaokun Yang, Jinwang Li, Chang Liu, Liguo Xu:
Research on Noise Simulation of Dynamic Comparator. EITCE 2021: 82-86 - [c16]Hongzhang Xiong, Jie Cheng, YanJin Wang, Xiaokun Yang, Kuo Wang:
Research on Cloud Computing Security Technology of Power System. ICBDS 2021: 269-283 - 2020
- [j8]Xiaokun Yang, Shi Sha, Ishaq Unwala, Jiang Lu:
Towards IP integration on SoC: a case study of high-throughput and low-cost wrapper design on a novel IBUS architecture. IET Comput. Digit. Tech. 14(6): 353-362 (2020) - [j7]Shi Sha, Ajinkya S. Bankar, Xiaokun Yang, Wujie Wen, Gang Quan:
On Fundamental Principles for Thermal-Aware Design on Periodic Real-Time Multi-Core Systems. ACM Trans. Design Autom. Electr. Syst. 25(2): 23:1-23:23 (2020)
2010 – 2019
- 2019
- [j6]Xiaokun Yang, Lei Wu, Xianlong He, Archit Gajjar, Yi Feng:
A Vision of Fog Systems with Integrating FPGAs and BLE Mesh Network. J. Commun. 14(3): 210-215 (2019) - [c15]xiaodi Fu, Jiang Lu, Xin Zhang, Xiaokun Yang, Ishaq Unwala:
Intelligent In-Vehicle Safety and Security Monitoring System with Face Recognition. CSE/EUC 2019: 225-229 - [c14]Xiaokun Yang, Yunxiang Zhang, Lei Wu:
A Scalable Image/Video Processing Platform with Open Source Design and Verification Environment. ISQED 2019: 110-116 - [c13]Yunxiang Zhang, Xiaokun Yang, Lei Wu, Jean Andrian:
A Case Study On Approximate FPGA Design With an Open-Source Image Processing Platform. ISVLSI 2019: 372-377 - [c12]Kevin Vaca, Archit Gajjar, Xiaokun Yang:
Real-Time Automatic Music Transcription (AMT) with Zync FPGA. ISVLSI 2019: 378-384 - 2018
- [j5]Xiaokun Yang, Wujie Wen, Ming Fan:
Improving AES Core Performance via an Advanced ASBUS Protocol. ACM J. Emerg. Technol. Comput. Syst. 14(1): 6:1-6:23 (2018) - [c11]Archit Gajjar, Xiaokun Yang, Lei Wu, Hakduran Koc, Ishaq Unwala, Yunxiang Zhang, Yi Feng:
An FPGA Synthesis of Face Detection Algorithm using HAAR Classifier. ICACS 2018: 133-137 - [c10]Yunxiang Zhang, Xiaokun Yang, Lei Wu, Jiang Lu, Kewei Sha, Archit Gajjar, Han He:
Exploring Slice-Energy Saving on an Video Processing FPGA Platform with Approximate Computing. ICACS 2018: 138-143 - 2017
- [j4]Ming Fan, Qiushi Han, Xiaokun Yang:
Energy minimization for on-line real-time scheduling with reliability awareness. J. Syst. Softw. 127: 168-176 (2017) - [j3]Xiaokun Yang, Nansong Wu, Jean H. Andrian:
Comparative Power Analysis of an Adaptive Bus Encoding Method on the MBUS Structure. VLSI Design 2017: 4914301:1-4914301:7 (2017) - [c9]Xiaokun Yang, Nansong Wu:
Design of a Secure Biofeedback Digital System (BFS) Using a 33-Step Training Table for Cardio Equipment. AHFE (19) 2017: 53-64 - [c8]Xiaokun Yang, Wujie Wen:
Design of a pre-scheduled data bus for advanced encryption standard encrypted system-on-chips. ASP-DAC 2017: 506-511 - [c7]Lucy Nwosu, Hui Wang, Jiang Lu, Ishaq Unwala, Xiaokun Yang, Ting Zhang:
Deep Convolutional Neural Network for Facial Expression Recognition Using Facial Parts. DASC/PiCom/DataCom/CyberSciTech 2017: 1318-1321 - [c6]Xiaokun Yang, Xianlong He:
Establishing a BLE mesh network with fabricated CSRmesh devices: demo abstract. SEC 2017: 34:1-34:2 - [c5]Archit Gajjar, Yunxiang Zhang, Xiaokun Yang:
A smart building system integrated with an edge computing algorithm and IoT mesh networks: demo abstract. SEC 2017: 35:1-35:2 - [i1]Han He, Xiaokun Yang, Lei Wu, Hua Yan, Zhimin Gao, Yi Feng, George Townsend:
Dual Long Short-Term Memory Networks for Sub-Character Representation Learning. CoRR abs/1712.08841 (2017) - 2016
- [j2]Xiaokun Yang, Nansong Wu, Jean H. Andrian:
A novel bus transfer mode (AS transfer) and a performance evaluation methodology. Integr. 52: 23-33 (2016) - [c4]Baoqi Huang, Guodong Qi, Xiaokun Yang, Long Zhao, Han Zou:
Exploiting cyclic features of walking for pedestrian dead reckoning with unconstrained smartphones. UbiComp 2016: 374-385 - 2015
- [j1]Xiaokun Yang, Jean H. Andrian:
A High-Performance On-Chip Bus (MSBUS) Design and Verification. IEEE Trans. Very Large Scale Integr. Syst. 23(7): 1350-1354 (2015) - 2014
- [c3]Xiaokun Yang, Jean H. Andrian:
A Low-Cost and High-Performance Embedded System Architecture and an Evaluation Methodology. ISVLSI 2014: 240-243 - 2010
- [c2]Xinglin Wang, Xiaokun Yang, Zheng Li:
Co-Existence Analysis of LTE Micro Cell and LTE Out-Band Backhaul. VTC Fall 2010: 1-5 - [c1]Yushu Zhang, Xinglin Wang, Xiaokun Yang, Xiaojin Zhang:
Study on Co-Existence of Macro WCDMA Cell and Micro HSUPA Cell. VTC Spring 2010: 1-5
Coauthor Index
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last updated on 2024-10-07 22:18 CEST by the dblp team
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