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ORCIDJens Huthmann
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2020 – today
- 2020
[c11]Jens Huthmann, Artur Podobas, Lukas Sommer, Andreas Koch, Kentaro Sano:
Extending High-Level Synthesis with High-Performance Computing Performance Visualization. CLUSTER 2020: 371-380- [c10]Jens Huthmann, Lukas Sommer
, Artur Podobas, Andreas Koch, Kentaro Sano:
OpenMP Device Offloading to FPGAs Using the Nymble Infrastructure. IWOMP 2020: 265-279 - [i2]Roman Iakymchuk, Daichi Mukunoki, Artur Podobas, Fabienne Jézéquel, Toshiyuki Imamura, Norihisa Fujita, Jens Huthmann, Shuhei Kudo, Yiyu Tan, Jens Domke, Kai Torben Ohlhus, Takeshi Fukaya, Takeo Hoshi, Yuki Murakami, Maho Nakata, Takeshi Ogita, Kentaro Sano, Taisuke Boku:
White Paper from Workshop on Large-scale Parallel Numerical Computing Technology (LSPANC 2020): HPC and Computer Arithmetic toward Minimal-Precision Computing. CoRR abs/2004.04628 (2020)
2010 – 2019
- 2019
- [c9]Jens Huthmann, Shin Abiko, Artur Podobas, Kentaro Sano, Hiroyuki Takizawa:
Scaling Performance for N-Body Stream Computation with a Ring of FPGAs. HEART 2019: 10:1-10:6 - 2017
- [b1]Jens Huthmann:
An Execution Model and High-Level-Synthesis System for Generating SIMT Multi-Threaded Hardware from C Source Code. Darmstadt University of Technology, Germany, 2017 - 2015
- [c8]Jens Huthmann, Andreas Koch:
Optimized high-level synthesis of SMT multi-threaded hardware accelerators. FPT 2015: 176-183 - 2014
- [c7]Jens Huthmann, Julian Oppermann, Andreas Koch:
Automatic high-level synthesis of multi-threaded hardware accelerators. FPL 2014: 1-4 - 2013
- [c6]Björn Liebig, Jens Huthmann, Andreas Koch:
Architecture Exploration of High-Performance Floating-Point Fused Multiply-Add Units and their Automatic Use in High-Level Synthesis. IPDPS Workshops 2013: 134-143 - [c5]Jens Huthmann, Björn Liebig, Julian Oppermann, Andreas Koch:
Hardware/software co-compilation with the Nymble system. ReCoSoC 2013: 1-8 - 2012
- [j1]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Memory Latency Hiding by Load Value Speculation for Reconfigurable Computers. ACM Trans. Reconfigurable Technol. Syst. 5(3): 13:1-13:14 (2012) - 2011
- [c4]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Precore - A Token-Based Speculation Architecture for High-Level Language to Hardware Compilation. FPL 2011: 123-129 - [c3]Benjamin Thielmann, Thorsten Wink, Jens Huthmann, Andreas Koch:
RAP: More Efficient Memory Access in Highly Speculative Execution on Reconfigurable Adaptive Computers. ReConFig 2011: 434-441 - [c2]Benjamin Thielmann, Jens Huthmann, Andreas Koch:
Evaluation of speculative execution techniques for high-level language to hardware compilation. ReCoSoC 2011: 1-8 - 2010
- [c1]Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch:
Accelerating high-level engineering computations by automatic compilation of Geometric Algebra to hardware accelerators. ICSAMOS 2010: 216-222 - [i1]Jens Huthmann, Peter Müller, Florian Stock, Dietmar Hildenbrand, Andreas Koch:
Compiling Geometric Algebra Computations into Reconfigurable Hardware Accelerators. Dynamically Reconfigurable Architectures 2010
Coauthor Index
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