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ORCIDSaurabh Kotiyal
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2010 – 2019
- 2016
[j5]Saurabh Kotiyal
, Himanshu Thapliyal:
Design Methodologies for Reversible Logic Based Barrel Shifters. J. Circuits Syst. Comput. 25(2): 1650003:1-1650003:34 (2016)- 2015
- [j4]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Reversible logic based multiplication computing unit using binary tree data structure. J. Supercomput. 71(7): 2668-2693 (2015) - 2014
- [j3]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Efficient reversible NOR gates and their mapping in optical computing domain. Microelectron. J. 45(6): 825-834 (2014) - [j2]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Design of Reversible Adder-Subtractor and its Mapping in Optical Computing Domain. Trans. Comput. Sci. 24: 37-55 (2014) - [c5]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Circuit for Reversible Quantum Multiplier Based on Binary Tree Optimizing Ancilla and Garbage Bits. VLSID 2014: 545-550 - [p1]Himanshu Thapliyal, Nagarajan Ranganathan, Saurabh Kotiyal:
Reversible Logic Based Design and Test of Field Coupled Nanocomputing Circuits. Field-Coupled Nanocomputing 2014: 133-172 - 2013
- [j1]Himanshu Thapliyal, Nagarajan Ranganathan, Saurabh Kotiyal:
Design of Testable Reversible Sequential Circuits. IEEE Trans. Very Large Scale Integr. Syst. 21(7): 1201-1209 (2013) - 2012
- [c4]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Mach-Zehnder interferometer based design of all optical reversible binary adder. DATE 2012: 721-726 - [c3]Saurabh Kotiyal, Himanshu Thapliyal, Nagarajan Ranganathan:
Mach-Zehnder Interferometer Based All Optical Reversible NOR Gates. ISVLSI 2012: 207-212
2000 – 2009
- 2006
- [c2]Himanshu Thapliyal, Saurabh Kotiyal, M. B. Srinivas:
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format. VLSI Design 2006: 387-392 - [i1]Himanshu Thapliyal, Saurabh Kotiyal, M. B. Srinivas:
Novel BCD Adders and Their Reversible Logic Implementation for IEEE 754r Format. CoRR abs/cs/0603088 (2006) - 2005
- [c1]Saurabh Kotiyal, Himanshu Thapliyal, M. B. Srinivas, Hamid R. Arabnia:
VLSI Implementation of O(n*n) Sorting Algorithms And Their Hardware Comparison. CSC 2005: 74-77
Coauthor Index
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