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Sunghoi Hur
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2020 – today
- 2024
- [c9]Wontaeck Jung, Hyunggon Kim, Do-Bin Kim, Tae-Hyun Kim, Nam-Hee Lee, Dongjin Shin, Minyoung Kim, Youngsik Rho, Hun-Jong Lee, Yujin Hyun, Jaeyoung Park, Taekyung Kim, Hwiwon Kim, Gyeongwon Lee, Jisang Lee, Joonsuc Jang, Jungmin Park, Sion Kim, Su Chang Jeon, Suyong Kim, Jung-Ho Song, Min-Seok Kim, Taesung Lee, Byung-Kwan Chun, Tongsung Kim, Young Gyu Lee, Hokil Lee, Soowoong Lee, Hwaseok Lee, Dooho Cho, Sangwan Nam, Yeomyung Kim, Kunyong Yoon, Yoonjae Lee, Sunghoon Kim, Jungseok Hwang, Raehyun Song, Hyunsik Jang, Jae-Ick Son, Hongsoo Jeon, Myunghun Lee, Mookyung Lee, Kisung Kim, Eungsuk Lee, Myeong-Woo Lee, Sungkyu Jo, Chan Ho Kim, Jong Chul Park, Kyunghwa Yun, Soonock Seol, Ji-Ho Cho, Seungjae Lee, Jin-Yub Lee, Sunghoi Hur:
13.3 A 280-Layer 1Tb 4b/cell 3D-NAND Flash Memory with a 28.5Gb/mm2 Areal Density and a 3.2GB/s High-Speed IO Rate. ISSCC 2024: 236-237 - [c8]Sehoon Lee, Jieun Lee, Sungpil Jang, Sujeong Kim, Choelgyu Kim, Narae Jeong Sae-Jin Kim, Jisoo Kang, Juhee Hong, Dong-Kyu Kim, Junhee Lim, Sejun Park, Seungwan Hong, Sunghoi Hur:
Mechanical Stress Effects on Dielectric Leakage and Interconnection Integrity in 3D NAND Flash Memory. VLSI Technology and Circuits 2024: 1-2 - [c7]Hang-Ah Park, Sejun Park, Min-Tai Yu, Ye-Chan Kim, Cheon Ho Park, Jung Hoon Lee, Jun Eon Jin, Dawoon Jeung, Hauk Han, Tai-Soo Lim, Min-Kyu Jeong, Mincheol Park, Bong-Tae Park, Sunghoi Hur:
Innovative Barrier Metal-Less Metal Gate Scheme Leading to Highly Reliable Cell Characteristics for 8th Generation 512Gb 3D NAND Flash Memory. VLSI Technology and Circuits 2024: 1-2 - 2023
- [c6]Soochan Chung, Dong-Hyeon Ko, Joonsung Lim, Kyungmoon Kim, Sejie Takaki, Yujeong Seo, Byoungil Lee, Sejun Park, Jaeduk Lee, Kyungyoon Noh, Sujin Ahn, Sunghoi Hur:
Process Improvements for 7th Generation 1Tb Quad-Level Cell 3D NAND Flash Memory in Mass Production. IMW 2023: 1-4 - [c5]Suhwan Lim, Samki Kim, Changhee Lee, Hyeongwon Choi, Nambin Kim, Jaehun Jung, Hanvit Yang, Tae-Hun Kim, Junhee Lim, Daewon Ha, Sunghoi Hur, Jae-hoon Jang, Yu-Gyun Shin, Jaihyuk Song:
Improvement of GIDL-assisted Erase by using Surrounded BL PAD Structure for VNAND. IMW 2023: 1-4 - [c4]Youngmin Jo, Anil Kavala, Tongsung Kim, Byung-Kwan Chun, Jungjune Park, Taesung Lee, Jungmin Seo, Manjae Yang, Taehyeon Park, Hyunjin Kwon, Cheolhui Lee, Younghoon Son, Junghwan Kwak, Younggyu Lee, Hwan-Seok Ku, Dae-Hoon Na, Changyeon Yu, Jonghoon Park, Jae-Hwan Kim, Hyojin Kwon, Chan-ho Kim, Moon-Ki Jung, Chanjin Park, Donghyun Seo, Moosung Kim, Seungjae Lee, Jin-Yub Lee, Dongku Kang, Chiweon Yoon, Sunghoi Hur:
A 3.0 Gb/s/pin 4th generation F-chip with Toggle 5.0 Specification for 16Tb NAND Flash Memory Multi chip Package. VLSI Technology and Circuits 2023: 1-2 - [c3]Kyungmoon Kim, Yujeong Seo, Sejun Park, Woojae Jang, Dongho Yoo, Joonsung Lim, Il-Han Park, Jaeduk Lee, Kyungyoon Noh, Sujin Ahn, Sunghoi Hur:
High Bit Cost Scalability and Reliable Cell Characteristics for 7th Generation 1Tb 4Bit/Cell 3D-NAND Flash. VLSI Technology and Circuits 2023: 1-2 - [c2]Changhwan Lee, Min-Tai Yu, Sejun Park, Hoki Lee, Bio Kim, Suhwan Lim, Jaeduk Lee, Sung-Hun Lee, Mincheol Park, Sujin Ahn, Sunghoi Hur:
Novel Strategies for Highly Uniform and Reliable Cell Characteristics of 8th Generation 1Tb 3D-NAND Flash Memory. VLSI Technology and Circuits 2023: 1-2 - [c1]Gooyoung Kim, Youngseon Moon, Jongmin Kim, Jaeyong Jeong, Eun-Kyoung Kim, Sunghoi Hur:
Kernel Smoothing Technique Based on Multiple-Coordinate System for Screening Potential Failures in NAND Flash Memory. VTS 2023: 1-7
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last updated on 2024-10-18 20:25 CEST by the dblp team
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