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Journal Articles
- 2023
[j2]Wei-Tse Hung, Yu-Guang Chen
, Jhen-Gang Lin, Yun-Wei Yang, Cheng-Hong Tsai, Mango Chia-Tso Chao:
DRC Violation Prediction After Global Route Through Convolutional Neural Network. IEEE Trans. Very Large Scale Integr. Syst. 31(9): 1425-1438 (2023)- 2017
- [j1]Wen-Hsiang Chang, Chien-Hsueh Lin, Szu-Pang Mu, Li-De Chen, Cheng-Hong Tsai, Yen-Chih Chiu, Mango C.-T. Chao:
Generating Routing-Driven Power Distribution Networks With Machine-Learning Technique. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36(8): 1237-1250 (2017)
Conference and Workshop Papers
- 2024
- [c8]Oscal T.-C. Chen, Cheng-Hong Tsai, Manh-Hung Ha:
Automatic Personality Recognition via XLNet with Refined Highway and Switching Module for Chatbot. ISCAS 2024: 1-5 - [c7]Yen-Yu Chen, Hao-Yu Wu, Iris Hui-Ru Jiang, Cheng-Hong Tsai, Chien-Cheng Wu:
Slack Redistributed Register Clustering with Mixed-Driving Strength Multi-bit Flip-Flops. ISPD 2024: 21-29 - 2023
- [c6]Jhen-Gang Lin, Yu-Guang Chen, Yun-Wei Yang, Wei-Tse Hung, Cheng-Hong Tsai, De-Shiun Fu, Mango Chia-Tso Chao:
DRC Violation Prediction with Pre-global-routing Features Through Convolutional Neural Network. ACM Great Lakes Symposium on VLSI 2023: 313-319 - 2020
- [c5]Xuan-Xue Huang, Hsien-Chia Chen, Sheng-Wei Wang, Iris Hui-Ru Jiang, Yih-Chih Chou, Cheng-Hong Tsai:
Dynamic IR-Drop ECO Optimization by Cell Movement with Current Waveform Staggering and Machine Learning Guidance. ICCAD 2020: 156:1-156:9 - [c4]Wei-Tse Hung, Jun-Yang Huang, Yih-Chih Chou, Cheng-Hong Tsai, Mango Chia-Tso Chao:
Transforming Global Routing Report into DRC Violation Map with Convolutional Neural Network. ISPD 2020: 57-64 - 2019
- [c3]Yih-Chih Chou, Chien-Cheng Wu, Cheng-Hong Tsai:
Clocking for HPC Design: Challenges and Experience Sharing. VLSI-DAT 2019: 1-2 - 2016
- [c2]Wen-Hsiang Chang, Li-De Chen, Chien-Hsueh Lin, Szu-Pang Mu, Mango Chia-Tso Chao, Cheng-Hong Tsai, Yen-Chih Chiu:
Generating Routing-Driven Power Distribution Networks with Machine-Learning Technique. ISPD 2016: 145-152 - 2007
- [c1]Shi-Hao Chen, Ke-Cheng Chu, Jiing-Yuan Lin, Cheng-Hong Tsai:
DFM/DFY practices during physical designs for timing, signal integrity, and power. ASP-DAC 2007: 232-237
Coauthor Index
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