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Journal Articles
- 2007
[j3]Erno Salminen, Tero Kangas, Vesa Lahtinen, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
Benchmarking mesh and hierarchical bus networks in system-on-chip context. J. Syst. Archit. 53(8): 477-488 (2007)- 2006
- [j2]Erno Salminen, Tero Kangas, Timo D. Hämäläinen, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna:
HIBI Communication Network for System-on-Chip. J. VLSI Signal Process. 43(2-3): 185-205 (2006) - 2002
- [j1]Vesa Lahtinen, Kimmo Kuusilinna, Tero Kangas, Timo Hämäläinen:
Interconnection scheme for continuous-media systems-on-a-chip. Microprocess. Microsystems 26(3): 123-138 (2002)
Conference and Workshop Papers
- 2006
- [c8]Vesa Lahtinen, Jouni Siirtola, Tommi Mäkeläinen:
Transaction Level Modeling in Communication Engine Design. FDL 2006: 197-203 - [c7]Vesa Lahtinen:
System Level Design Experiences and the Need for Standardization. SoC 2006: 1-4 - 2005
- [c6]Erno Salminen, Tero Kangas, Jouni Riihimäki, Vesa Lahtinen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Benchmarking Mesh and Hierarchical Bus Networks in System-on-Chip Context. SAMOS 2005: 354-363 - 2004
- [c5]Erno Salminen, Vesa Lahtinen, Tero Kangas, Jouni Riihimäki, Kimmo Kuusilinna, Timo D. Hämäläinen:
HIBI v.2 Communication Network for System-on-Chip. SAMOS 2004: 413-422 - [c4]Tero Kangas, Jouni Riihimäki, Erno Salminen, Vesa Lahtinen, Heikki Orsila, Kimmo Kuusilinna, Timo D. Hämäläinen:
A Communication-Centric Design Flow for HIBI-Based SoCs. SAMOS 2004: 474-483 - 2003
- [c3]Vesa Lahtinen, Erno Salminen, Kimmo Kuusilinna, Timo D. Hämäläinen:
Comparison of synthesized bus and crossbar interconnection architectures. ISCAS (5) 2003: 433-436 - 2002
- [c2]Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen:
Optimizing finite state machines for system-on-chip communication. ISCAS (1) 2002: 485-488 - 2000
- [c1]Vesa Lahtinen, Kimmo Kuusilinna, Timo Hämäläinen, Tero Kangas, Jukka Saarinen:
Reuseable interface in multimedia hardware environment. EUSIPCO 2000: 1-4
Coauthor Index
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