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2020 – today
- 2024
[j8]Minkyo Shim
, Seungha Roh, Yunhee Lee, Jung-Woo Sull, Deog-Kyoon Jeong, Kwanseo Park:
A 50-Gb/s PAM-4 Receiver With Adaptive Phase-Shifting CDR in 28-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 71(8): 3550-3560 (2024)- [j7]Seungha Roh, Minkyo Shim, Yoojin Jung, Deog-Kyoon Jeong, Kwanseo Park:
A Low-Jitter Phase Detection Technique With Asymmetric Weights in Multi-Level Baud-Rate CDR. IEEE Trans. Circuits Syst. I Regul. Pap. 71(12): 5861-5872 (2024) - [j6]Suil Kang, Dongwoo Kang, Sinho Lee, Minkyo Shim, Seungha Roh, Sunjin Choi, Kwanseo Park:
A 0.09-pJ/b/dB 28-Gb/s Digital CDR With ISI-Resistant Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs 71(11): 4618-4622 (2024) - 2023
- [j5]Minkyo Shim, Kwang-Hoon Lee, Seungha Roh, Kwanseo Park, Deog-Kyoon Jeong:
A 1.1-pJ/b 8-to-16-Gb/s Receiver With Stochastic CTLE Adaptation. IEEE Trans. Circuits Syst. II Express Briefs 70(2): 381-385 (2023) - [j4]Yunhee Lee, Minkyo Shim, Seungha Roh, Woonghee Lee, Deog-Kyoon Jeong:
An 80-Gb/s PAM-4 Simultaneous Bidirectional Transceiver With Hybrid Adaptation Scheme. IEEE Trans. Circuits Syst. II Express Briefs 70(8): 2884-2888 (2023) - [j3]Kwang-Hoon Lee, Jung-Hun Park, Yongjae Lee, Yeonggeun Song, Seungha Roh, Minkyo Shim, Yoonho Song, Woosong Jung, Young-Ha Hwang, Jonghyun Oh, Woo-Seok Choi, Deog-Kyoon Jeong:
A 0.99-pJ/b 10-Gb/s Receiver With Fast Recovery From Sleep Mode Under Voltage Drift. IEEE Trans. Circuits Syst. II Express Briefs 70(11): 4003-4007 (2023) - [c3]Woosong Jung, Minkyo Shim, Seungha Roh, Deog-Kyoon Jeong:
A 14-28 Gb/s Reference-less Baud-rate CDR with Integrator-based Stochastic Phase and Frequency Detector. ISCAS 2023: 1-5 - 2022
- [j2]Moon-Chul Choi, Sanghee Lee, Seungha Roh, Kwangho Lee, Jonghyun Oh, Sungwoo Kim, Kwandong Kim, Woo-Seok Choi, Jaeha Kim, Deog-Kyoon Jeong:
A 2.5-32 Gb/s Gen 5-PCIe Receiver With Multi-Rate CDR Engine and Hybrid DFE. IEEE Trans. Circuits Syst. II Express Briefs 69(6): 2677-2681 (2022) - [j1]Seungha Roh, Kwangho Lee, Minkyo Shim, Moon-Chul Choi, Deog-Kyoon Jeong:
A 64-Gb/s PAM-4 Receiver With Transition-Weighted Phase Detector. IEEE Trans. Circuits Syst. II Express Briefs 69(9): 3704-3708 (2022) - 2021
- [c2]Seungha Roh, Moon-Chul Choi, Deog-Kyoon Jeong:
A Maximum Eye Tracking Clock-and-Data Recovery Scheme with Golden Section Search(GSS) Algorithm in 28-nm CMOS. ISOCC 2021: 47-48 - [c1]Hong-Seok Choi, Seungha Roh, Sanghee Lee, Jung-Hoon Park, Kwanghoon Lee, Young-Ha Hwang, Deog-Kyoon Jeong:
A 6b 48-GS/s Asynchronous 2b/cycle Time-Interleaved ADC in 28-nm CMOS. ISOCC 2021: 127-128
Coauthor Index
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