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2020 – today
- 2024
[j4]Zhuang Shao
, Chenjia Xie, Zihan Ning, Qi Wu, Liang Chang, Yuan Du, Li Du:
An Efficient GCN Accelerator Based on Workload Reorganization and Feature Reduction. IEEE Trans. Circuits Syst. I Regul. Pap. 71(2): 646-659 (2024)- [j3]Chenjia Xie, Zhuang Shao, Zhichao Chen, Yuan Du, Li Du:
An Energy-Efficient Spiking Neural Network Accelerator Based on Spatio-Temporal Redundancy Reduction. IEEE Trans. Very Large Scale Integr. Syst. 32(4): 782-786 (2024) - 2023
- [j2]Chenjia Xie, Zhuang Shao, Ning Zhao, Yuan Du, Li Du:
An Efficient CNN Inference Accelerator Based on Intra- and Inter-Channel Feature Map Compression. IEEE Trans. Circuits Syst. I Regul. Pap. 70(9): 3625-3638 (2023) - [c4]Hang Xu, Chenjia Xie, Xin Lu, Li Du, Yuan Du:
Memory-Efficient Compression Based on Least-Squares Fitting in Convolutional Neural Network Accelerators. ASICON 2023: 1-4 - [c3]Zihan Ning, Tong Sun, Jizhao Li, Yanfei Ren, Chenjia Xie, Li Du, Lianggong Wen, Yuan Du:
Graph Neural Network Assisted S-Parameter Inference and Control-Word Generation of Terahertz Reconfigurable Intelligent Surface. ICTA 2023: 41-42 - 2022
- [j1]Zhuang Shao, Xiaoliang Chen, Li Du, Lei Chen, Yuan Du, Wei Zhuang, Huadong Wei, Chenjia Xie, Zhongfeng Wang:
Memory-Efficient CNN Accelerator Based on Interlayer Feature Map Compression. IEEE Trans. Circuits Syst. I Regul. Pap. 69(2): 668-681 (2022) - [c2]Chenjia Xie, Zhuang Shao, Hang Xu, Xiaoliang Chen, Li Du, Yuan Du, Zhongfeng Wang:
Deep Neural Network Interlayer Feature Map Compression Based on Least-Squares Fitting. ISCAS 2022: 3398-3402 - [c1]Xingyuan Hu, Zhuang Shao, Chenjia Xie, Li Du, Yuan Du:
SVR: A Shard-aware Vertex Reordering Method for Efficient GNN Execution and Memory Access. ISOCC 2022: 165-166 - 2021
- [i1]Zhuang Shao, Xiaoliang Chen, Li Du, Lei Chen, Yuan Du, Wei Zhuang, Huadong Wei, Chenjia Xie, Zhongfeng Wang:
Memory-Efficient CNN Accelerator Based on Interlayer Feature Map Compression. CoRR abs/2110.06155 (2021)
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