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ORCIDMarwan Jalaleddine
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2020 – today
- 2024
[j4]Huayi Zhou, Ryan Seah, Marwan Jalaleddine, Warren J. Gross:
Decoding of Polar Codes Using Quadratic Unconstrained Binary Optimization. IEEE J. Sel. Areas Commun. 42(11): 3204-3216 (2024)- 2023
- [j3]Syed Mohsin Abbas
, Marwan Jalaleddine, Warren J. Gross:
List-GRAND: A Practical Way to Achieve Maximum Likelihood Decoding. IEEE Trans. Very Large Scale Integr. Syst. 31(1): 43-54 (2023) - [c6]Syed Mohsin Abbas, Chi-Ying Tsui, Marwan Jalaleddine, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-Input Decoder. GLOBECOM (Workshops) 2023: 1668-1673 - [c5]Marwan Jalaleddine, Huayi Zhou, Jiajie Li, Warren J. Gross:
Partial Ordered Statistics Decoding with Enhanced Error Patterns. ISIT 2023: 1096-1100 - [c4]Ryan Seah, Huayi Zhou, Marwan Jalaleddine, Warren J. Gross:
xSA: A Binary Cross-Entropy Simulated Annealing Polar Decoder. ISTC 2023: 1-5 - [i6]Syed Mohsin Abbas, Marwan Jalaleddine, Chi-Ying Tsui, Warren J. Gross:
Step-GRAND: A Low Latency Universal Soft-input Decoder. CoRR abs/2307.07133 (2023) - 2022
- [j2]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. IEEE Trans. Very Large Scale Integr. Syst. 30(6): 681-693 (2022) - [j1]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
Hardware Architecture for Guessing Random Additive Noise Decoding Markov Order (GRAND-MO). J. Signal Process. Syst. 94(10): 1047-1065 (2022) - [c3]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
GRAND for Rayleigh Fading Channels. GLOBECOM (Workshops) 2022: 504-509 - [i5]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
GRAND for Rayleigh Fading Channels. CoRR abs/2205.00030 (2022) - 2021
- [c2]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for Soft-Decision Decoding with ORBGRAND. ICASSP 2021: 8288-8292 - [c1]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND Markov Order. SiPS 2021: 158-163 - [i4]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI architecture for Soft-Decision decoding with ORBGRAND. CoRR abs/2105.07115 (2021) - [i3]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
High-Throughput VLSI Architecture for GRAND Markov Order. CoRR abs/2108.12563 (2021) - [i2]Syed Mohsin Abbas, Marwan Jalaleddine, Warren J. Gross:
List-GRAND: A practical way to achieve Maximum Likelihood Decoding. CoRR abs/2109.12225 (2021) - [i1]Syed Mohsin Abbas, Thibaud Tonnellier, Furkan Ercan, Marwan Jalaleddine, Warren J. Gross:
High-Throughput and Energy-Efficient VLSI Architecture for Ordered Reliability Bits GRAND. CoRR abs/2110.13776 (2021)
Coauthor Index
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