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2020 – today
- 2024
[j5]Mujtaba Hassan
, Arish Sateesan, Jo Vliegen, Stjepan Picek, Nele Mentens:
A Genetic Programming approach for hardware-oriented hash functions for network security applications. Appl. Soft Comput. 165: 112078 (2024)- [j4]Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens:
SPArch: A Hardware-oriented Sketch-based Architecture for High-speed Network Flow Measurements. ACM Trans. Priv. Secur. 27(4): 29:1-29:34 (2024) - 2023
- [j3]Arish Sateesan, Jelle Biesmans, Thomas Claesen, Jo Vliegen, Nele Mentens:
Optimized algorithms and architectures for fast non-cryptographic hash functions in hardware. Microprocess. Microsystems 98: 104782 (2023) - [c9]Mujtaba Hassan, Arish Sateesan, Jo Vliegen, Stjepan Picek, Nele Mentens:
Evolving Non-cryptographic Hash Functions Using Genetic Programming for High-speed Lookups in Network Security Applications. EvoApplications@EvoStar 2023: 302-318 - [c8]Simon Scherrer, Jo Vliegen, Arish Sateesan, Hsu-Chun Hsiao, Nele Mentens, Adrian Perrig:
ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. SRDS 2023: 162-172 - [i2]Simon Scherrer, Jo Vliegen, Arish Sateesan, Hsu-Chun Hsiao, Nele Mentens, Adrian Perrig:
ALBUS: a Probabilistic Monitoring Algorithm to Counter Burst-Flood Attacks. CoRR abs/2306.14328 (2023) - 2022
- [j2]Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens:
Hardware-oriented optimization of Bloom filter algorithms and architectures for ultra-high-speed lookups in network applications. Microprocess. Microsystems 93: 104619 (2022) - [c7]Arish Sateesan, Jo Vliegen, Nele Mentens:
An Analysis of the Hardware-Friendliness of AMQ Data Structures for Network Security. SPACE 2022: 287-313 - 2021
- [j1]Arish Sateesan, Sharad Sinha, Smitha K. G., A. P. Vinod:
A Survey of Algorithmic and Hardware Optimization Techniques for Vision Convolutional Neural Networks on FPGAs. Neural Process. Lett. 53(3): 2331-2377 (2021) - [c6]Thomas Claesen, Arish Sateesan, Jo Vliegen, Nele Mentens:
Novel Non-cryptographic Hash Functions for Networking and Security Applications on FPGA. DSD 2021: 347-354 - [c5]Arish Sateesan, Jo Vliegen, Simon Scherrer, Hsu-Chun Hsiao, Adrian Perrig, Nele Mentens:
Speed Records in Network Flow Measurement on FPGA. FPL 2021: 219-224 - [c4]Laurens Le Jeune, Arish Sateesan, Md Masoom Rabbani, Toon Goedemé, Jo Vliegen, Nele Mentens:
SoK - Network Intrusion Detection on FPGA. SPACE 2021: 242-261 - [c3]Simon Scherrer, Che-Yu Wu, Yu-Hsi Chiang, Benjamin Rothenberger, Daniele Enrico Asoni, Arish Sateesan, Jo Vliegen, Nele Mentens, Hsu-Chun Hsiao, Adrian Perrig:
Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. SRDS 2021: 265-276 - [i1]Simon Scherrer, Che-Yu Wu, Yu-Hsi Chiang, Benjamin Rothenberger, Daniele Enrico Asoni, Arish Sateesan, Jo Vliegen, Nele Mentens, Hsu-Chun Hsiao, Adrian Perrig:
Low-Rate Overuse Flow Tracer (LOFT): An Efficient and Scalable Algorithm for Detecting Overuse Flows. CoRR abs/2102.01397 (2021) - 2020
- [c2]Arish Sateesan, Jo Vliegen, Joan Daemen, Nele Mentens:
Novel Bloom filter algorithms and architectures for ultra-high-speed network security applications. DSD 2020: 262-269 - [c1]Arish Sateesan, Sharad Sinha, Smitha K. G.:
DASH: Design Automation for Synthesis and Hardware Generation for CNN. FPT 2020: 72-75
Coauthor Index
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