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ORCIDYu Du 0002
Person information
- affiliation: University of Pittsburgh, Department of Computer Science, Pittsburgh, PA, USA
Other persons with the same name
- Yu Du — disambiguation page
- Yu Du 0001
![[0000-0002-7208-2688]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-7208-2688")
— Dalian Jiaotong University, School of Mechanical Engineering, Dalian, China (and 4 more) - Yu Du 0003 — University of Colorado at Denver, Business School, Denver, CO, USA (and 1 more)
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2010 – 2019
- 2016
[j6]Miao Zhou, Yu Du, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
Symmetry-Agnostic Coordinated Management of the Memory Hierarchy in Multicore Systems. ACM Trans. Archit. Code Optim. 12(4): 61:1-61:26 (2016)- 2015
- [c11]Yu Du, Miao Zhou, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
Supporting superpages in non-contiguous physical memory. HPCA 2015: 223-234 - 2014
- [j5]Bo Zhao, Yu Du, Jun Yang, Youtao Zhang:
Errata to "Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor". IEEE Trans. Computers 63(2): 525-526 (2014) - 2013
- [j4]Yu Du, Miao Zhou, Bruce R. Childers, Rami G. Melhem, Daniel Mossé:
Delta-compressed caching for overcoming the write bandwidth limitation of hybrid main memory. ACM Trans. Archit. Code Optim. 9(4): 55:1-55:20 (2013) - [j3]Lei Jiang, Yu Du, Bo Zhao, Youtao Zhang, Bruce R. Childers, Jun Yang:
Hardware-Assisted Cooperative Integration of Wear-Leveling and Salvaging for Phase Change Memory. ACM Trans. Archit. Code Optim. 10(2): 7:1-7:25 (2013) - [j2]Bo Zhao, Yu Du, Jun Yang, Youtao Zhang:
Process Variation-Aware Nonuniform Cache Management in a 3D Die-Stacked Multicore Processor. IEEE Trans. Computers 62(11): 2252-2265 (2013) - [c10]Miao Zhou, Yu Du, Bruce R. Childers, Rami G. Melhem, Daniel Mossé:
Writeback-aware bandwidth partitioning for multi-core systems with PCM. PACT 2013: 113-122 - [c9]Yu Du, Miao Zhou, Bruce R. Childers, Daniel Mossé, Rami G. Melhem:
Bit mapping for balanced PCM cell programming. ISCA 2013: 428-439 - 2012
- [j1]Miao Zhou, Yu Du, Bruce R. Childers, Rami G. Melhem, Daniel Mossé:
Writeback-aware partitioning and replacement for last-level caches in phase change main memory systems. ACM Trans. Archit. Code Optim. 8(4): 53:1-53:21 (2012) - 2011
- [c8]Lei Jiang, Yu Du, Youtao Zhang, Bruce R. Childers, Jun Yang:
LLS: Cooperative integration of wear-leveling and salvaging for PCM main memory. DSN 2011: 221-232 - [c7]Yi Xu, Yu Du, Youtao Zhang, Jun Yang:
A composite and scalable cache coherence protocol for large scale CMPs. ICS 2011: 285-294 - 2010
- [c6]Ping Zhou, Yu Du, Youtao Zhang, Jun Yang:
Fine-grained QoS scheduling for PCM-based main memory systems. IPDPS 2010: 1-12
2000 – 2009
- 2009
- [c5]Ping Zhou, Bo Zhao, Yu Du, Yi Xu, Youtao Zhang, Jun Yang, Li Zhao:
Frequent value compression in packet-based NoC architectures. ASP-DAC 2009: 13-18 - [c4]Yi Xu, Yu Du, Bo Zhao, Xiuyi Zhou, Youtao Zhang, Jun Yang:
A low-radix and low-diameter 3D interconnection network design. HPCA 2009: 30-42 - [c3]Bo Zhao, Yu Du, Youtao Zhang, Jun Yang:
Variation-tolerant non-uniform 3D cache management in die stacked multicore processor. MICRO 2009: 222-231 - 2008
- [c2]Weijia Li, Yu Du, Youtao Zhang, Bruce R. Childers, Ping Zhou, Jun Yang:
Adaptive Buffer Management for Efficient Code Dissemination in Multi-Application Wireless Sensor Networks. EUC (1) 2008: 295-301 - [c1]Xiuyi Zhou, Yi Xu, Yu Du, Youtao Zhang, Jun Yang:
Thermal Management for 3D Processors via Task Scheduling. ICPP 2008: 115-122
Coauthor Index
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