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Bipul Boro

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Journal Articles

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2023
[j2]
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  - journals/tvlsi/DongreBT23
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Ashvinikumar Dongre, Bipul Boro, Gaurav Trivedi:
ADC-Less Reprogrammable RRAM Array Architecture for In-Memory Computing. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2053-2060 (2023)
2020
[j1]
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Bipul Boro, Karri Manikantta Reddy, Nithin Y. B. Kumar, M. H. Vasantha:
Approximate radix-8 Booth multiplier for low power and high speed applications. Microelectron. J. 101: 104816 (2020)

Conference and Workshop Papers

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2024
[c2]
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Bipul Boro, Rushik Parmar, Ashvinikumar Dongre, Gaurav Trivedi:
Reprogrammable Time-Domain RRAM Based Vector Matrix Multiplier for In-Memory Computing. ISQED 2024: 1-8
2023
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Bipul Boro, Ashvinikumar Dongre, Rushik Parmar, Gaurav Trivedi:
Programmable Binary Weighted Time-Domain Vector Matrix Multiplier for In-Memory Computing. APCCAS 2023: 261-265

Coauthor Index

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