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Journal Articles
- 2023
[j2]Marius Meyer
, Tobias Kenter, Christian Plessl:
Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-switched Inter-FPGA Networks. ACM Trans. Reconfigurable Technol. Syst. 16(2): 24:1-24:27 (2023)- 2022
- [j1]Marius Meyer, Tobias Kenter, Christian Plessl:
In-depth FPGA accelerator performance evaluation with single node benchmarks from the HPC challenge benchmark suite for Intel and Xilinx FPGAs using OpenCL. J. Parallel Distributed Comput. 160: 79-89 (2022)
Conference and Workshop Papers
- 2024
- [c4]Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl:
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. Euro-Par (2) 2024: 121-136 - [c3]Abdul Rehman Tareen, Marius Meyer, Christian Plessl, Tobias Kenter:
HiHiSpMV: Sparse Matrix Vector Multiplication with Hierarchical Row Reductions on FPGAs with High Bandwidth Memory. FCCM 2024: 32-42 - 2021
- [c2]Marius Meyer:
Towards Performance Characterization of FPGAs in Context of HPC using OpenCL Benchmarks. HEART 2021: 14:1-14:2 - 2020
- [c1]Marius Meyer, Tobias Kenter, Christian Plessl:
Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of Selected Benchmarks of the HPCChallenge Benchmark Suite. H2RC@SC 2020: 10-18
Informal and Other Publications
- 2024
- [i3]Marius Meyer, Tobias Kenter, Lucian Petrica, Kenneth O'Brien, Michaela Blott, Christian Plessl:
Optimizing Communication for Latency Sensitive HPC Applications on up to 48 FPGAs Using ACCL. CoRR abs/2403.18374 (2024) - 2022
- [i2]Marius Meyer, Tobias Kenter, Christian Plessl:
Multi-FPGA Designs and Scaling of HPC Challenge Benchmarks via MPI and Circuit-Switched Inter-FPGA Networks. CoRR abs/2202.13995 (2022) - 2020
- [i1]Marius Meyer, Tobias Kenter, Christian Plessl:
Evaluating FPGA Accelerator Performance with a Parameterized OpenCL Adaptation of the HPCChallenge Benchmark Suite. CoRR abs/2004.11059 (2020)
Coauthor Index
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