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Ayoub Sadeghi
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2020 – today
- 2024
- [j15]Mahmood Rafiee, Nabiollah Shiri, Mohsen Gharehkhani, Alexandra Pinto Castellanos, Ayoub Sadeghi:
Characterizing parameter variations for enhanced performance and adaptability in 3 nm MBCFET technology. Microelectron. J. 151: 106338 (2024) - 2023
- [j14]Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee:
High-efficient and error-resilient gate diffusion input-based approximate full adders for complex multistage rapid structures. Comput. Electr. Eng. 109(Part A): 108776 (2023) - [j13]Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri:
High Efficient GDI-CNTFET-Based Approximate Full Adder for Next Generation of Computer Architectures. IEEE Embed. Syst. Lett. 15(1): 33-36 (2023) - [j12]Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Abdolreza Darabi, Ebrahim Abiri:
Voltage over-scaling CNT-based 8-bit multiplier by high-efficient GDI-based counters. IET Comput. Digit. Tech. 17(1): 1-19 (2023) - [j11]Ayoub Sadeghi, Razieh Ghasemi, Hossein Ghasemian, Nabiollah Shiri:
Efficient and optimized approximate GDI full adders based on dynamic threshold CNTFETs for specific least significant bits. Frontiers Inf. Technol. Electron. Eng. 24(4): 599-616 (2023) - 2022
- [j10]Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi, Abdolreza Darabi, Ebrahim Abiri:
Low-Power and Fast-Swing-Restoration GDI-Based Magnitude Comparator for Digital Images Processing. Circuits Syst. Signal Process. 41(9): 4848-4885 (2022) - [j9]Mahmood Rafiee, Nabiollah Shiri, Ayoub Sadeghi:
High-Performance 1-Bit Full Adder With Excellent Driving Capability for Multistage Structures. IEEE Embed. Syst. Lett. 14(1): 47-50 (2022) - [j8]Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Rahim Ghayour:
Tolerant and low power subtractor with 4: 2 compressor and a new TG-PTL-float full adder cell. IET Circuits Devices Syst. 16(6): 437-460 (2022) - [j7]Nabiollah Shiri, Ayoub Sadeghi, Mahmood Rafiee, Maryam Bigonah:
SR-GDI CNTFET-based magnitude comparator for new generation of programmable integrated circuits. Int. J. Circuit Theory Appl. 50(5): 1511-1536 (2022) - [j6]Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Mahsa Tahghigh:
An efficient counter-based Wallace-tree multiplier with a hybrid full adder core for image blending. Frontiers Inf. Technol. Electron. Eng. 23(6): 950-965 (2022) - 2021
- [j5]Mahmood Rafiee, Farshad Pesaran, Ayoub Sadeghi, Nabiollah Shiri:
An efficient multiplier by pass transistor logic partial product and a modified hybrid full adder for image processing applications. Microelectron. J. 118: 105287 (2021) - 2020
- [j4]Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee, Parisa Rahimi:
A low-power pseudo-dynamic full adder cell for image addition. Comput. Electr. Eng. 87: 106787 (2020) - [j3]Ebrahim Abiri, Abdolreza Darabi, Mohammad Reza Salehi, Ayoub Sadeghi:
Optimized Gate Diffusion Input Method-Based Reversible Magnitude Arithmetic Unit Using Non-dominated Sorting Genetic Algorithm II. Circuits Syst. Signal Process. 39(9): 4516-4551 (2020) - [j2]Ayoub Sadeghi, Nabiollah Shiri, Mahmood Rafiee:
High-Efficient, Ultra-Low-Power and High-Speed 4: 2 Compressor with a New Full Adder Cell for Bioelectronics Applications. Circuits Syst. Signal Process. 39(12): 6247-6275 (2020)
2010 – 2019
- 2019
- [j1]Ebrahim Abiri, Abdolreza Darabi, Ayoub Sadeghi:
Gate-diffusion input (GDI) method for designing energy-efficient circuits in analogue voltage-mode fuzzy and QCA systems. Microelectron. J. 87: 81-100 (2019)
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