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ORCIDAnil Kumar Rajput
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2020 – today
- 2023
[j4]Anil Kumar Rajput
, Alok Kumar Tiwari, Manisha Pattanaik:
An Energy-Efficient Hybrid SRAM-Based In-Memory Computing Macro for Artificial Intelligence Edge Devices. Circuits Syst. Signal Process. 42(6): 3589-3616 (2023)- [j3]Anil Kumar Rajput, Manisha Pattanaik:
Local bit line 8T SRAM based in-memory computing architecture for energy-efficient linear error correction codec implementation. Microelectron. J. 137: 105795 (2023) - [c4]Noopur Srivastava, Anil Kumar Rajput, Manisha Pattanaik, Gaurav Kaushal:
An Energy-Efficient and Robust 10T SRAM Based in-Memory Computing Architecture. VLSID 2023: 133-138 - 2022
- [j2]Anil Kumar Rajput, Manisha Pattanaik, Gaurav Kaushal:
Local bit-line shared pass-gate 8T SRAM based energy efficient and reliable In-Memory Computing architecture. Microelectron. J. 129: 105569 (2022) - 2020
- [c3]Anil Kumar Rajput, Manisha Pattanaik:
Energy Efficient 9T SRAM With R/W Margin Enhanced for beyond Von-Neumann Computation. VDAT 2020: 1-4
2010 – 2019
- 2019
- [j1]Ayas Kanta Swain, Anil Kumar Rajput, Kamala Kanta Mahapatra:
Network on Chip for Consumer Electronics Devices: An Architectural and Performance Exploration of Synchronous and Asynchronous Network-on-Chip-Based Systems. IEEE Consumer Electron. Mag. 8(3): 50-54 (2019) - [c2]Neelam Arya, Anil Kumar Rajput, Manisha Pattanaik, G. K. Sharma:
Quality Driven Energy Aware Approximated Core Transform Architecture for HEVC Standard. VDAT 2019: 398-412 - 2016
- [c1]Ayas Kanta Swain, Anil Kumar Rajput, Kamalakanta Mahapatra:
Parametric Performance Analysis of Synchronous and Asynchronous Heterogeneous Network on Chip. iNIS 2016: 108-112
Coauthor Index
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