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Dwaipayan Ray
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2020 – today
- 2024
- [j8]Shouharda Ghosh, Pramod Kumar Meher, Dwaipayan Ray, Nithin V. George:
Low Complexity Design of Logistic Distance Metric Adaptive Filter for Impulsive Noise Environments. IEEE Trans. Very Large Scale Integr. Syst. 32(8): 1409-1413 (2024) - 2021
- [j7]Nilanjana Das, Riom Sen, Dwaipayan Ray, Nandini Banerjee, Joy Halder, Hannu Tenhunen, Biplab K. Sikdar:
A trojan framework in AES core to evade state-of-the-art HT detection schemes. Microelectron. J. 111: 105023 (2021) - [j6]Trisrota Deb, Dwaipayan Ray, Nithin V. George:
A Reduced Complexity Random Fourier Filter Based Nonlinear Multichannel Narrowband Active Noise Control System. IEEE Trans. Circuits Syst. II Express Briefs 68(1): 516-520 (2021) - 2020
- [j5]Dwaipayan Ray, Nithin V. George, Pramod Kumar Meher:
An Analytical Framework and Approximation Strategy for Efficient Implementation of Distributed Arithmetic-Based Inner-Product Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(1): 212-224 (2020) - [j4]Trisrota Deb, Dwaipayan Ray, Nithin V. George:
Design of Nonlinear Filters Using Affine Projection Algorithm Based Exact and Approximate Adaptive Exponential Functional Link Networks. IEEE Trans. Circuits Syst. 67-II(11): 2757-2761 (2020) - [j3]Sankha Subhra Bhattacharjee, Dwaipayan Ray, Nithin V. George:
Adaptive Modified Versoria Zero Attraction Least Mean Square Algorithms. IEEE Trans. Circuits Syst. 67-II(12): 3602-3606 (2020) - [j2]Dwaipayan Ray, Nithin V. George, Pramod Kumar Meher:
Analysis and Design of Unified Architectures for Zero-Attraction-Based Sparse Adaptive Filters. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1321-1325 (2020) - [c2]Jayanta Paul, Rajat Subhra Bhowmick, Riom Sen, Dwaipayan Ray, Suman S. Manjhi, Soumya Sen, Biplab K. Sikdar:
Evaluation of Face Recognition Schemes for Low-computation IoT System Design. VDAT 2020: 1-6
2010 – 2019
- 2019
- [c1]Dwaipayan Ray, Nithin V. George, Pramod Kumar Meher:
Analysis and Design of Approximate Inner-Product Architectures Based on Distributed Arithmetic. ISCAS 2019: 1-5 - 2018
- [j1]Dwaipayan Ray, Nithin V. George, Pramod Kumar Meher:
Efficient Shift-Add Implementation of FIR Filters Using Variable Partition Hybrid Form Structures. IEEE Trans. Circuits Syst. I Regul. Pap. 65-I(12): 4247-4257 (2018)
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last updated on 2024-10-07 22:20 CEST by the dblp team
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