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2020 – today
- 2022
[c7]Johannes Knödtel, Sebastian Rachuj, Marc Reichenbach:
Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? DSD 2022: 247-253- [c6]Florian Fricke
, Stefan Scharoba, Sebastian Rachuj, Andreas Konopik, Florian Kluge, Georg Hofstetter, Marc Reichenbach:
Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning. SAMOS 2022: 235-249 - [c5]Farehe Giahi, Sebastian Rachuj, Dietmar Fey:
Investigating SAMV Regarding its Suitability For FPGAs. SOCC 2022: 1-6 - 2021
- [j1]Marc Reichenbach, Johannes Knödtel, Sebastian Rachuj, Dietmar Fey:
RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems. IEEE Access 9: 43684-43700 (2021) - 2020
- [c4]Sebastian Rachuj, Dietmar Fey, Marc Reichenbach:
Impact of Performance Estimation on Fast Processor Simulators. SimuTools (2) 2020: 79-93
2010 – 2019
- 2019
- [c3]Sebastian Rachuj, Marc Reichenbach, Dietmar Fey:
A Generic Functional Simulation of Heterogeneous Systems. ARCS 2019: 128-141 - 2018
- [c2]Sebastian Rachuj, Christian Herglotz, Marc Reichenbach, André Kaup, Dietmar Fey:
A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. ARCS 2018: 85-96 - [c1]Sebastian Rachuj, Marc Reichenbach, Steffen Vaas, Dietmar Fey:
Autonomous Driving in the Curriculum of Computer Architecture. EWME 2018: 11-16
Coauthor Index
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