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2020 – today
- 2022
[b1]Steffen Vaas:
Anwendungsspezifische Mehrkernarchitekturen für sicherheitskritische Echtzeitanwendungen. University of Erlangen-Nuremberg, Germany, Dr. Hut 2022, ISBN 978-3-8439-5040-4, pp. 1-200- 2021
- [c9]Steffen Vaas, Peter Ulbrich, Christian Eichler, Peter Wägemann, Marc Reichenbach, Dietmar Fey:
Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design. ISORC 2021: 43-52
2010 – 2019
- 2019
- [j1]Steffen Vaas, Peter Ulbrich
, Marc Reichenbach, Dietmar Fey:
Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. J. Signal Process. Syst. 91(7): 773-786 (2019) - 2018
- [c8]Marc Reichenbach, Lukas Liebischer, Steffen Vaas, Dietmar Fey:
Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures. DASIP 2018: 48-53 - [c7]Wolfgang Bauer, Philipp Holzinger, Marc Reichenbach, Steffen Vaas, Paul Hartke, Dietmar Fey:
Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. Euro-Par Workshops 2018: 733-744 - [c6]Sebastian Rachuj, Marc Reichenbach, Steffen Vaas, Dietmar Fey:
Autonomous Driving in the Curriculum of Computer Architecture. EWME 2018: 11-16 - 2017
- [c5]Steffen Vaas, Peter Ulbrich, Marc Reichenbach, Dietmar Fey:
The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs. DASIP 2017: 1-6 - [c4]Tobias Lieske, Benjamin Pfundt, Steffen Vaas, Marc Reichenbach, Dietmar Fey:
System on chip generation for multi-sensor and sensor fusion applications. SAMOS 2017: 20-29 - 2016
- [c3]Steffen Vaas, Marc Reichenbach, Dietmar Fey:
An Application-Specific Instruction Set Processor for Power Quality Monitoring. IPDPS Workshops 2016: 181-188 - [c2]Steffen Vaas, Marc Reichenbach, Ulrich Margull, Dietmar Fey:
The R2-D2 toolchain - Automated porting of safety-critical applications to FPGAs. ReConFig 2016: 1-7 - 2015
- [c1]Marc Reichenbach, Tobias Lieske, Steffen Vaas, Konrad Häublein, Dietmar Fey:
FAUPU - A design framework for the development of programmable image processing architectures. ReConFig 2015: 1-8
Coauthor Index
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