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2020 – today
- 2024
[c12]Matús Oleksák, Vojtech Miskovský:
Impact of Compiler Optimization Flags on Side-Channel Information Leakage of SipHash Algorithm. DSD 2024: 51-56- 2023
- [c11]Matús Oleksák, Vojtech Miskovský:
Is ASCON the best choice regarding the Side-channel Analysis? MECO 2023: 1-5 - 2022
- [j4]Petr Socha
, Vojtech Miskovský, Martin Novotný:
A Comprehensive Survey on the Non-Invasive Passive Side-Channel Analysis. Sensors 22(21): 8096 (2022) - [c10]Matús Oleksák, Vojtech Miskovský:
Correlation Power Analysis of SipHash. DDECS 2022: 84-87 - [c9]Petr Socha, Vojtech Miskovský, Martin Novotný:
A fair experimental evaluation of distance correlation side-channel distinguisher. MECO 2022: 1-4 - 2021
- [j3]Petr Socha, Vojtech Miskovský, Martin Novotný:
High-level synthesis, cryptography, and side-channel countermeasures: A comprehensive evaluation. Microprocess. Microsystems 85: 104311 (2021) - [c8]Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Secure and dependable: Area-efficient masked and fault-tolerant architectures. DSD 2021: 333-338
2010 – 2019
- 2019
- [j2]Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Efficient algorithmic evaluation of correlation power analysis: Key distinguisher based on the correlation trace derivative. Microprocess. Microsystems 71 (2019) - [c7]Petr Socha, Vojtech Miskovský, Martin Novotný:
First-Order and Higher-Order Power Analysis: Computational Approaches and Aspects. MECO 2019: 1-5 - 2018
- [c6]Stanislav Jerabek, Jan Schmidt, Martin Novotný, Vojtech Miskovský:
Dummy Rounds as a DPA Countermeasure in Hardware. DSD 2018: 523-528 - [c5]Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Correlation Power Analysis Distinguisher Based on the Correlation Trace Derivative. DSD 2018: 565-568 - [c4]Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Speeding up differential power analysis using integrated power traces. MECO 2018: 1-5 - [i1]Nele Mentens, Vojtech Miskovský, Martin Novotný, Jo Vliegen:
High-speed Side-channel-protected Encryption and Authentication in Hardware. IACR Cryptol. ePrint Arch. 2018: 1088 (2018) - 2017
- [j1]Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Influence of passive hardware redundancy on differential power analysis resistance of AES cipher implemented in FPGA. Microprocess. Microsystems 51: 220-226 (2017) - [c3]Petr Socha, Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Optimization of Pearson correlation coefficient calculation for DPA and comparison of different approaches. DDECS 2017: 184-189 - [c2]Jan Riha, Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Influence of Fault-Tolerance Techniques on Power-Analysis Resistance of Cryptographic Design. DSD 2017: 260-267 - 2016
- [c1]Vojtech Miskovský, Hana Kubátová, Martin Novotný:
Influence of fault-tolerant design methods on differential power analysis resistance of AES cipher: Methodics and challenges. MECO 2016: 14-17
Coauthor Index
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