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ORCIDMarek Syrzycki
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2010 – 2019
- 2016
[c11]Adrian Tanskanen, Behraad Bahreyni, Marek Syrzycki:
Charge-based femto-farad capacitance measurement technique for MEMS applications. CCECE 2016: 1-4- 2013
- [c10]Thomas Au, Marek Syrzycki:
Investigation of STI diodes as electrostatic discharge (ESD) protection devices in deep submicron (DSM) CMOS process. CCECE 2013: 1-5 - 2012
- [c9]Cheng Zhang, Thomas Au, Marek Syrzycki:
A high performance NMOS-switch high swing cascode charge pump for phase-locked loops. MWSCAS 2012: 554-557 - 2011
- [j3]Chin-Hsin Lin, Marek Syrzycki:
Single-Stage Vernier Time-to-Digital Converter with Sub-Gate Delay Time Resolution. Circuits Syst. 2(4): 365-371 (2011) - [c8]Cheng Zhang, Ming-Cheng Lin, Marek Syrzycki:
Process variation compensated voltage controlled ring oscillator with Subtraction-based Voltage Controlled Current Source. CCECE 2011: 731-734 - [c7]Ming-Cheng Lin, Marek Syrzycki:
Current source transistor optimization methodology for noise optimized charge sensitive amplifier with fast shaper. CCECE 2011: 735-738
2000 – 2009
- 2007
- [c6]Harry I. A. Chen, Edward K. W. Loo, James B. Kuo, Marek Syrzycki:
Triple-Threshold Static Power Minimization in High-Level Synthesis of VLSI CMOS. PATMOS 2007: 453-462 - 2006
- [j2]Robert Sobot, Shawn P. Stapleton, Marek Syrzycki:
Tunable continuous-time bandpass ΣΔ modulators with fractional delays. IEEE Trans. Circuits Syst. I Regul. Pap. 53-I(2): 264-273 (2006) - 2004
- [c5]Krzysztof Iniewski, Sebastian Magierowski, Marek Syrzycki:
Phase Locked Loop gain shaping for gigahertz operation. ISCAS (4) 2004: 157-160 - [c4]Krzysztof Iniewski, Marek Syrzycki:
Low Power 2.5 Gb/s Serializer for SOC Applications. ISVLSI 2004: 211-212 - [c3]Krzysztof Iniewski, Valery Axelrad, Andrei Shibkov, Artur Balasinski, Marek Syrzycki:
Design Strategies for ESD Protection in SOC. IWSOC 2004: 210-214 - [c2]Krzysztof Iniewski, R. Badalone, M. Lapointe, Marek Syrzycki:
SERDES Technology for Gigabit I/O Communications in Storage Area Networking. IWSOC 2004: 247-252 - 2002
- [c1]Pedram Khademsameni, Marek Syrzycki:
Manufacturability Analysis of Analog CMOS ICs through Examination of Multiple Layout Solutions. DFT 2002: 3-11
1990 – 1999
- 1992
- [j1]Glenn H. Chapman, M. Parameswaran, Marek Syrzycki:
Wafer-Scale Transducer Arrays. Computer 25(4): 50-56 (1992)
Coauthor Index
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