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Zeinab Seifoori
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2020 – today
- 2023
- [j3]Zeinab Seifoori
, Behzad Omidi, Hossein Asadi
:
PERA: Power-Efficient Routing Architecture for SRAM-Based FPGAs in Dark Silicon Era. IEEE Trans. Very Large Scale Integr. Syst. 31(12): 2075-2088 (2023) - 2021
- [j2]Zeinab Seifoori, Hossein Asadi
, Mirjana Stojilovic
:
Shrinking FPGA Static Power via Machine Learning-Based Power Gating and Enhanced Routing. IEEE Access 9: 115599-115619 (2021) - 2020
- [c3]Zeinab Seifoori, Seyedeh Sharareh Mirzargar, Mirjana Stojilovic
:
Closing Leaks: Routing Against Crosstalk Side-Channel Attacks. FPGA 2020: 197-203
2010 – 2019
- 2019
- [c2]Zeinab Seifoori, Hossein Asadi, Mirjana Stojilovic
:
A Machine Learning Approach for Power Gating the FPGA Routing Network. FPT 2019: 10-18 - 2018
- [j1]Zeinab Seifoori, Zahra Ebrahimi
, Behnam Khaleghi, Hossein Asadi:
Chapter Seven - Introduction to Emerging SRAM-Based FPGA Architectures in Dark Silicon Era. Adv. Comput. 110: 259-294 (2018) - 2017
- [c1]Zeinab Seifoori, Behnam Khaleghi, Hossein Asadi
:
A power gating switch box architecture in routing network of SRAM-based FPGAs in dark silicon era. DATE 2017: 1342-1347
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