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Milova Paul
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2020 – today
- 2021
- [c4]Sagar Premnath Karalkar, Vishal Ganesan, Milova Paul, Kyong Jin Hwang, Robert Gauthier:
Design Optimization of MV-NMOS to Improve Holding Voltage of a 28nm CMOS Technology ESD Power Clamp. IRPS 2021: 1-5 - 2020
- [c3]M. Monishmurali, Milova Paul, Mayank Shrivastava:
Improved Turn-on Uniformity & Failure Current Density by n-& p-Tap Engineering in Fin Based SCRs. IRPS 2020: 1-6
2010 – 2019
- 2018
- [c2]Milova Paul, Boeila Sampath Kumar, Harald Gossner, Mayank Shrivastava:
Contact and junction engineering in bulk FinFET technology for improved ESD/latch-up performance with design trade-offs and its implications on hot carrier reliability. IRPS 2018: 3 - 2017
- [c1]Milova Paul, Christian Russ, Boeila Sampath Kumar, Harald Gossner, Mayank Shrivastava:
Physics of Current Filamentation in ggNMOS Revisited: Was Our Understanding Scientifically Complete? VLSID 2017: 391-394
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last updated on 2025-01-09 13:26 CET by the dblp team
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