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2020 – today
- 2024
[j6]Chenlin Shi
, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda:
CNFET-OCL: Open-Source Cell Libraries for Advanced CNFET Technologies. IEEE Access 12: 165335-165347 (2024)- [j5]Kohei Yoshida, Shinobu Miwa, Hayato Yamaki, Hiroki Honda:
Analyzing the impact of CUDA versions on GPU applications. Parallel Comput. 120: 103081 (2024) - [c10]Tomoya Kusaba, Yusuke Awaki, Kohei Yoshida, Shinobu Miwa, Hayato Yamaki, Toshihiro Hanawa, Hiroki Honda:
Power-Efficiency Variation on A64FX Supercomputers and its Application to System Operation. CLUSTER Workshops 2024: 55-65 - [c9]Kota Shimojima, Shinobu Miwa, Hayato Yamaki, Hiroki Honda:
Evaluating MPI Performance on SGX and Gramine. CLUSTER Workshops 2024: 172-173 - 2023
- [c8]Chenlin Shi, Shinobu Miwa, Tongxin Yang, Ryota Shioya, Hayato Yamaki, Hiroki Honda:
CNFET7: An Open Source Cell Library for 7-nm CNFET Technology. ASP-DAC 2023: 763-768 - 2022
- [c7]Kohei Yoshida, Rio Sageyama, Shinobu Miwa, Hayato Yamaki, Hiroki Honda:
Analyzing Performance and Power-Efficiency Variations among NVIDIA GPUs. ICPP 2022: 65:1-65:12 - 2021
- [c6]Shoichi Hirasawa, Hayato Yamaki, Michihiro Koibuchi:
Packet Forwarding Cache of Commodity Switches for Parallel Computers. CLUSTER 2021: 366-376 - 2020
- [j4]Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda:
Evaluating architecture-level optimization in packet processing caches. Comput. Networks 181: 107550 (2020) - [j3]Hayato Yamaki, Hiroaki Nishi, Shinobu Miwa, Hiroki Honda:
RPC: An Approach for Reducing Compulsory Misses in Packet Processing Cache. IEICE Trans. Inf. Syst. 103-D(12): 2590-2599 (2020) - [j2]Hayato Yamaki:
Effective cache replacement policy for packet processing cache. Int. J. Commun. Syst. 33(14) (2020) - [j1]Shinobu Miwa, Masaya Ishihara, Hayato Yamaki, Hiroki Honda, Martin Schulz:
Footprint-Based DIMM Hotplug. IEEE Trans. Computers 69(2): 172-184 (2020)
2010 – 2019
- 2019
- [c5]Kyosuke Tanaka, Hayato Yamaki, Shinobu Miwa, Hiroki Honda:
Multi-Level Packet Processing Caches. COOL CHIPS 2019: 1-3 - [c4]Yuta Inouchi, Hayato Yamaki, Shinobu Miwa, Tomoaki Tsumura:
Functionally-Predefined Kernel: a Way to Reduce CNN Computation. PACRIM 2019: 1-6 - 2018
- [c3]Hayato Yamaki, Hiroaki Nishi, Shinobu Miwa, Hiroki Honda:
Data prediction for response flows in packet processing cache. DAC 2018: 110:1-110:6 - 2016
- [c2]Momoka Ohba, Satoshi Shindo, Shinobu Miwa, Tomoaki Tsumura, Hayato Yamaki, Hiroki Honda:
Initial Study of Reconfigurable Neural Network Accelerators. CANDAR 2016: 707-709 - [c1]Hayato Yamaki, Hiroaki Nishi:
Line Replacement Algorithm for L1-scale Packet Processing Cache. MobiQuitous (Adjunct Proceedings) 2016: 12-17
Coauthor Index
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