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Vineeth Govind

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2010 – 2019

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2015
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  - conf/nocs/SaltarelliNRGHJ15
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Pietro Saltarelli, Behrad Niazmand, Jaan Raik, Vineeth Govind, Thomas Hollstein, Gert Jervan, Ranganathan Hariharan:
A Framework for Combining Concurrent Checking and On-Line Embedded Test for Low-Latency Fault Detection in NoC Routers. NOCS 2015: 6:1-6:8
2012
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Jaan Raik, Vineeth Govind:
Low-area boundary BIST architecture for mesh-like network-on-chip. DDECS 2012: 95-100
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  - conf/issoc/TatenguemSGRB12
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Hervé Tatenguem, Alessandro Strano, Vineeth Govind, Jaan Raik, Davide Bertozzi:
Ultra-low latency NoC testing via pseudo-random test pattern compaction. ISSoC 2012: 1-6

2000 – 2009

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2009
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Jaan Raik, Vineeth Govind, Raimund Ubar:
Design-for-testability-based external test and diagnosis of mesh-like network-on-a-chips. IET Comput. Digit. Tech. 3(5): 476-486 (2009)
2007
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Jaan Raik, Raimund Ubar, Vineeth Govind:
Test Configurations for Diagnosing Faulty Links in NoC Switches. ETS 2007: 29-34
2006
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Jaan Raik, Vineeth Govind, Raimund Ubar:
An External Test Approach for Network-on-a-Chip Switches. ATS 2006: 437-442

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