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ORCIDKai Li 0024
Person information
- affiliation: Southern University of Science and Technology, School of Microelectronics, Shenzhen, Guangdong, China
Other persons with the same name
- Kai Li — disambiguation page
- Kai Li 0001
![[0000-0002-2095-7024]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0002-2095-7024")
— Princeton University, NJ, USA - Kai Li 0002 — University of Cambridge, Department of Engineering, UK (and 3 more)
- Kai Li 0003 — Beijing University of Posts and Telecommunications, State Key Laboratory of Networking and Switching Technology, China
- Kai Li 0004 — North University of China, Department of the Shanxi Key Laboratory of Signal Capturing and Processing, Taiyuan, China
- Kai Li 0005 — Facebook Inc, Menlo Park, CA, USA (and 1 more)
- Kai Li 0006 — Fujian Normal University, School of Mathematics and Computer Science, Fuzhou, China
- Kai Li 0007 — East Carolina University, Department of Industrial Technology, Greenville, NC, USA (and 1 more)
- Kai Li 0008 — Toyohashi University of Technology, Research Center for Agrotechnology and Biotechnology, Japan
- Kai Li 0009 — InterDigital Communications, Melville, NY, USA (and 1 more)
- Kai Li 0010 — Renmin University of China, School of Information Resource Management, Beijing, China (and 2 more)
- Kai Li 0011 — Shanghai University of Finance and Economics, School of Information Management and Engineering, China
- Kai Li 0012 — NEC Laboratories America, Machine Learning Department, Princeton, NJ, USA (and 1 more)
- Kai Li 0013 — Zhengzhou Institute of Surveying and Mapping, China
- Kai Li 0014 — University of Electronic Science and Technology of China, School of Automation Engineering, Chengdu, China
- Kai Li 0015 — Wuhan University, School of Remote Sensing and Information Engineering, Hubei, China
- Kai Li 0016 — Shanghai University, School of Communication and Information Engineering, China (and 1 more)
- Kai Li 0017 — San Diego State University, CA, USA (and 1 more)
- Kai Li 0018 — Japan Advanced Institute of Science and Technology, School of Information Science, Japan
- Kai Li 0019 — Hefei University of Technology, School of Management, China
- Kai Li 0020 — Nankai University, Business School, Tianjin, China
- Kai Li 0021 — Chinese Academy of Sciences, State Key Laboratory of Resources and Environmental Information System, Beijing, China (and 3 more)
- Kai Li 0022 — Chinese Academy of Sciences, Institute of Automation, Beijing, China (and 1 more)
- Kai Li 0023 — Tsinghua University, Department of Computer Science and Technology, Beijing, China (and 1 more)
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Journal Articles
- 2024
[j6]Laimin Du, Leibin Ni, Xiong Liu, Guanqi Peng, Kai Li, Wei Mao, Hao Yu:
A Low-Power DNN Accelerator With Mean-Error-Minimized Approximate Signed Multiplier. IEEE Open J. Circuits Syst. 5: 57-68 (2024)- [j5]Boyu Li, Kai Li, Jiajun Zhou, Yuan Ren, Wei Mao, Hao Yu, Ngai Wong:
A Reconfigurable Processing Element for Multiple-Precision Floating/Fixed-Point HPC. IEEE Trans. Circuits Syst. II Express Briefs 71(3): 1401-1405 (2024) - 2022
- [j4]Mingqiang Huang, Yucen Liu, Changhai Man, Kai Li, Quan Cheng, Wei Mao, Hao Yu:
A High Performance Multi-Bit-Width Booth Vector Systolic Accelerator for NAS Optimized Deep Learning Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 69(9): 3619-3631 (2022) - [j3]Kai Li, Wei Mao, Junzhuo Zhou, Boyu Li, Zhengke Yang, Shuxing Yang, Laimin Du, Sixiao Huang, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. IEEE Trans. Circuits Syst. II Express Briefs 69(10): 4123-4127 (2022) - [j2]Wei Mao, Kai Li, Quan Cheng, Liuyao Dai, Boyu Li, Xinang Xie, He Li, Longyang Lin, Hao Yu:
A Configurable Floating-Point Multiple-Precision Processing Element for HPC and AI Converged Computing. IEEE Trans. Very Large Scale Integr. Syst. 30(2): 213-226 (2022) - [j1]Wei Mao, Liuyao Dai, Kai Li, Quan Cheng, Yuhang Wang, Laimin Du, Shaobo Luo, Mingqiang Huang, Hao Yu:
An Energy-Efficient Mixed-Bitwidth Systolic Accelerator for NAS-Optimized Deep Neural Networks. IEEE Trans. Very Large Scale Integr. Syst. 30(12): 1878-1890 (2022)
Conference and Workshop Papers
- 2024
- [c10]Kai Li, Hantao Huang, Mingqiang Huang, Chenchen Ding, Longyang Lin, Liebing Ni, Hao Yu:
A 29.12 TOPS/W and 1.13 TOPS/mm2 NAS-Optimized Mixed-Precision DNN Accelerator with Vector Split- and-Combination Systolic in 28nm CMOS. CICC 2024: 1-2 - [c9]Shuxin Yang, Chenchen Ding, Mingqiang Huang, Kai Li, Chenghao Li, Zikun Wei, Sixiao Huang, Jingyao Dong, Liuyang Zhang, Hao Yu:
LAMPS: A Layer-wised Mixed-Precision-and-Sparsity Accelerator for NAS-Optimized CNNs on FPGA. FCCM 2024: 90-96 - 2023
- [c8]Haoxiang Zhou, Haiqiao Hong, Dingbang Liu, Hang Liu, Yu Xia, Kai Li, Jun Liu, Shaobo Luo, Wei Mao, Hao Yu:
RISC-V based Fully-Parallel SRAM Computing-in-Memory Accelerator with High Hardware Utilization and Data Reuse Rate. AICAS 2023: 1-5 - [c7]Mingqiang Huang, Yucen Liu, Sixiao Huang, Kai Li, Qiuping Wu, Hao Yu:
Multi-bit-width CNN Accelerator with Systolic-in-Systolic Dataflow and Single DSP Multiple Multiplication Scheme. FPGA 2023: 229 - 2022
- [c6]Kai Li, Junzhuo Zhou, Boyu Li, Shuxing Yang, Sixiao Huang, Shaobo Luo, Wei Mao, Hao Yu:
A Vector Systolic Accelerator for Multi-Precision Floating-Point High-Performance Computing. AICAS 2022: 226-229 - [c5]Liuyao Dai, Quan Cheng, Yuhang Wang, Gengbin Huang, Junzhuo Zhou, Kai Li, Wei Mao, Hao Yu:
An Energy-Efficient Bit-Split-and-Combination Systolic Accelerator for NAS-Based Multi-Precision Convolution Neural Networks. ASP-DAC 2022: 448-453 - [c4]Kai Li, Junzhuo Zhou, Yuhang Wang, Junyi Luo, Zhengke Yang, Shuxin Yang, Wei Mao, Mingqiang Huang, Hao Yu:
A Precision-Scalable Energy-Efficient Bit-Split-and-Combination Vector Systolic Accelerator for NAS-Optimized DNNs on Edge. DATE 2022: 730-735 - [c3]Mingqiang Huang, Yucen Liu, Quan Cheng, Shuxin Yang, Kai Li, Junyi Luo, Zhengke Yang, Qiufeng Li, Hao Yu, Changhai Man:
A High Throughput Multi-bit-width 3D Systolic Accelerator for NAS Optimized Deep Neural Networks on FPGA. FPGA 2022: 50 - 2021
- [c2]Kai Li, Wei Mao, Xinang Xie, Quan Cheng, Huan Xie, Zhenjiang Dong, Hao Yu:
Multiple-Precision Floating-Point Dot Product Unit for Efficient Convolution Computation. AICAS 2021: 1-4 - [c1]Wei Mao, Kai Li, Xinang Xie, Shirui Zhao, He Li, Hao Yu:
A Reconfigurable Multiple-Precision Floating-Point Dot Product Unit for High-Performance Computing. DATE 2021: 1793-1798
Informal and Other Publications
- 2024
- [i1]Mingqiang Huang, Ao Shen, Kai Li, Haoxiang Peng, Boyu Li, Hao Yu:
EdgeLLM: A Highly Efficient CPU-FPGA Heterogeneous Edge Accelerator for Large Language Models. CoRR abs/2407.21325 (2024)
Coauthor Index
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last updated on 2024-12-29 02:26 CET by the dblp team
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