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Sanjay Parihar
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2020 – today
- 2020
- [j5]Gobinda Saha, Zhewei Jiang, Sanjay Parihar, Xi Cao, Jack M. Higman, Muhammed Ahosan Ul Karim:
An Energy-Efficient and High Throughput in-Memory Computing Bit-Cell With Excellent Robustness Under Process Variations for Binary Neural Network. IEEE Access 8: 91405-91414 (2020) - [j4]Randy W. Mann, Meixiong Zhao, Oh Sung Kwon, Xi Cao, Sanjay Parihar, Muhammed Ahosan Ul Karim, Jack M. Higman, Joseph Versaggi, Rick Carter:
Bias-Dependent Variation in FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. 28(5): 1341-1344 (2020)
2010 – 2019
- 2019
- [j3]Randy W. Mann, Meixiong Zhao, Sanjay Parihar, Qun Gao, Ankur Arya, Carl Radens, Shesh Mani Pandey, Joseph Versaggi, Jack M. Higman, Rick Carter:
An Extrinsic Device and Leakage Mechanism in Advanced Bulk FinFET SRAM. IEEE Trans. Very Large Scale Integr. Syst. 27(8): 1819-1827 (2019) - 2016
- [j2]Srinivas Jallepalli, Ram Mooraka, Sanjay Parihar, Earl Hunter, Elie Maalouf:
Employing Scaled Sigma Sampling for Efficient Estimation of Rare Event Probabilities in the Absence of Input Domain Mapping. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(6): 943-956 (2016) - [j1]Srinivas Jallepalli, Ram Mooraka, Sanjay Parihar, Earl Hunter, Elie Maalouf:
Rapid Assessment of Design Sensitivity to Process Excursions via Scaled Sigma Sampling. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35(6): 957-970 (2016) - 2015
- [c2]David Burnett, Sriram Balasubramanian, Vivek Joshi, Sanjay Parihar, Jack M. Higman, C. Weintraub:
SRAM Vmax stability considerations. IRPS 2015: 6 - 2014
- [c1]David Burnett, Sanjay Parihar, Hema Ramamurthy, Sriram Balasubramanian:
FinFET SRAM design challenges. ICICDT 2014: 1-4
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