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Si-Nai Kim

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2010 – 2019

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2018
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Si-Nai Kim, Woo-Cheol Kim, Min-Jae Seo, Seung-Tak Ryu:
A 65-nm CMOS 6-Bit 20 GS/s Time-Interleaved DAC With Full-Binary Sub-DACs. IEEE Trans. Circuits Syst. II Express Briefs 65-II(9): 1154-1158 (2018)
2016
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Si-Nai Kim, Mee-Ran Kim, Ba-Ro-Saim Sung, Hyun-Wook Kang, Min-Hyung Cho, Seung-Tak Ryu:
A SUC-Based Full-Binary 6-bit 3.1-GS/s 17.7-mW Current-Steering DAC in 0.038 mm². IEEE Trans. Very Large Scale Integr. Syst. 24(2): 794-798 (2016)

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