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2020 – today
- 2020
[c7]Yuanwen Huang, Prabhat Mishra
:
Vulnerability-aware Dynamic Reconfiguration of Partially Protected Caches. ISQED 2020: 255-260
2010 – 2019
- 2019
- [j4]Yuanwen Huang, Prabhat Mishra:
Vulnerability-Aware Energy Optimization for Reconfigurable Caches in Multitasking Systems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38(5): 809-821 (2019) - [j3]Alif Ahmed, Yuanwen Huang, Prabhat Mishra:
Cache Reconfiguration Using Machine Learning for Vulnerability-aware Energy Optimization. ACM Trans. Embed. Comput. Syst. 18(2): 15:1-15:24 (2019) - 2018
- [j2]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
Scalable Test Generation for Trojan Detection Using Side Channel Analysis. IEEE Trans. Inf. Forensics Secur. 13(11): 2746-2760 (2018) - [c6]Jonathan Cruz, Yuanwen Huang, Prabhat Mishra, Swarup Bhunia:
An automated configurable Trojan insertion framework for dynamic trust benchmarks. DATE 2018: 1598-1603 - 2017
- [j1]Yuanwen Huang, Prabhat Mishra:
Trace Buffer Attack on the AES Cipher. J. Hardw. Syst. Secur. 1(1): 68-84 (2017) - [c5]Farimah Farahmandi, Yuanwen Huang, Prabhat Mishra:
Trojan localization using symbolic algebra. ASP-DAC 2017: 591-597 - [c4]Yuanwen Huang, Prabhat Mishra:
Vulnerability-Aware Energy Optimization Using Reconfigurable Caches in Multicore Systems. ICCD 2017: 241-248 - 2016
- [c3]Yuanwen Huang, Swarup Bhunia, Prabhat Mishra:
MERS: Statistical Test Generation for Side-Channel Analysis based Trojan Detection. CCS 2016: 130-141 - [c2]Yuanwen Huang, Prabhat Mishra:
Reliability and energy-aware cache reconfiguration for embedded systems. ISQED 2016: 313-318 - 2015
- [c1]Yuanwen Huang, Anupam Chattopadhyay, Prabhat Mishra:
Trace Buffer Attack: Security versus observability study in post-silicon debug. VLSI-SoC 2015: 355-360
Coauthor Index
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