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Kenji Taniguchi 0001
Person information
- affiliation: Osaka University, Japan
Other persons with the same name
- Kenji Taniguchi 0002 — Kanazawa University, School of Environmental Design, Japan
- Kenji Taniguchi 0003 — Fukui University, Japan
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2010 – 2019
- 2013
- [j40]Tetsuro Okura, Shunsuke Okura, Toshimasa Matsuoka, Kenji Taniguchi:
A low-power technique for pipelined ADCs with programmable gain amplification. IEICE Electron. Express 10(1): 20120876 (2013) - 2012
- [j39]Shun Ueda, Yusuke Miyawaki, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi:
Wireless on-chip microparticle manipulation using pulse-driven dielectrophoresis. IEICE Electron. Express 9(1): 16-22 (2012) - [j38]Daisuke Kanemoto, Yu Tamura, Indika U. K. Bogoda Appuhamylage, Toshimasa Matsuoka, Kenji Taniguchi:
A novel RC time constant tuning technique utilizing programmable current sources for continuous-time delta-sigma modulators. IEICE Electron. Express 9(6): 572-579 (2012) - [j37]Daisuke Kanemoto, Toru Ido, Kenji Taniguchi:
A High Dynamic Range and Low Power Consumption Audio Delta-Sigma Modulator with Opamp Sharing Technique among Three Integrators. IEICE Trans. Electron. 95-C(8): 1427-1433 (2012) - 2011
- [j36]Indika U. K. Bogoda Appuhamylage, Daisuke Kanemoto, Kenji Taniguchi:
A Novel 100ppm/°C current reference for ultra-low-power subthreshold applications. IEICE Electron. Express 8(3): 168-174 (2011) - [j35]Hyunju Ham, Toshimasa Matsuoka, Jun Wang, Kenji Taniguchi:
Design of a 500-MS/s stochastic signal detection circuit using a non-linearity reduction technique in a 65-nm CMOS process. IEICE Electron. Express 8(6): 353-359 (2011) - [j34]Yu Tamura, Toru Ido, Kenji Taniguchi:
A Dynamic Dither Gain Control Technique for Multi-Level Delta-Sigma DACs with Multi-Stage Second Order Dynamic Element Matching. IEICE Trans. Electron. 94-C(3): 346-352 (2011) - [j33]Indika U. K. Bogoda Appuhamylage, Shunsuke Okura, Toru Ido, Kenji Taniguchi:
An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference. IEICE Trans. Electron. 94-C(6): 960-967 (2011) - [j32]Hisayasu Sato, Takaya Maruyama, Toshimasa Matsuoka, Kenji Taniguchi:
A Wide Dynamic Range Variable Gain Amplifier with Enhanced IP1 dB and Temperature Compensation. IEICE Trans. Electron. 94-C(8): 1311-1319 (2011) - [j31]Yu Tamura, Toru Ido, Kenji Taniguchi:
A Multi-Stage Second Order Dynamic Element Matching with In-Band Mismatch Noise Reduction Enhancement. IEICE Trans. Electron. 94-C(8): 1340-1343 (2011) - [j30]Takatsugu Kamata, Kazunori Okui, Masahiko Fukasawa, Toshimasa Matsuoka, Kenji Taniguchi:
Low-power zero-IF full-segment ISDB-T CMOS tuner with tenth-order baseband filters. IEEE Trans. Consumer Electron. 57(2): 403-410 (2011) - [c15]Daisuke Kanemoto, Toru Ido, Kenji Taniguchi:
A 7.5mW 101dB SNR low-power high-performance audio delta-sigma modulator utilizing opamp sharing technique. ISOCC 2011: 66-69 - 2010
- [j29]Bao-Lin Wei, Yu-jie Dai, Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi:
Design of a low-voltage CMOS mixer based on variable load technique. IEICE Electron. Express 7(7): 473-479 (2010) - [j28]Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi:
A Transformer Noise-Canceling Ultra-Wideband CMOS Low-Noise Amplifier. IEICE Trans. Electron. 93-C(2): 187-199 (2010) - [j27]Toshimasa Matsuoka, Jun Wang, Takao Kihara, Hyunju Ham, Kenji Taniguchi:
Low-Voltage Wireless Analog CMOS Circuits toward 0.5 V Operation. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 93-A(2): 356-366 (2010) - [j26]Indika U. K. Bogoda Appuhamylage, Shunsuke Okura, Toru Ido, Kenji Taniguchi:
An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique. IEEE Trans. Circuits Syst. II Express Briefs 57-II(10): 762-766 (2010) - [j25]Shunsuke Okura, Hajime Shibata, Tetsuro Okura, Toru Ido, Kenji Taniguchi:
A Frequency Model of a Continuously Driven Clocked CMOS Comparator. IEEE Trans. Circuits Syst. II Express Briefs 57-II(12): 956-960 (2010) - [j24]Takatsugu Kamata, Toshimasa Matsuoka, Kenji Taniguchi:
Rf front-end design for CMOS terrestrial wideband TV tuner IC. IEEE Trans. Consumer Electron. 56(3): 1340-1348 (2010)
2000 – 2009
- 2009
- [j23]Fumiaki Yamashita, Toshimasa Matsuoka, Takao Kihara, Isao Takobe, Hae-Ju Park, Kenji Taniguchi:
Analytical design of a 0.5V 5GHz CMOS LC-VCO. IEICE Electron. Express 6(14): 1025-1031 (2009) - [j22]Shunsuke Okura, Tetsuro Okura, Toru Ido, Kenji Taniguchi:
A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(2): 367-373 (2009) - [j21]Takao Kihara, Hae-Ju Park, Isao Takobe, Fumiaki Yamashita, Toshimasa Matsuoka, Kenji Taniguchi:
A 0.5 V Area-Efficient Transformer Folded-Cascode CMOS Low-Noise Amplifier. IEICE Trans. Electron. 92-C(4): 564-575 (2009) - [j20]Hyunju Ham, Toshimasa Matsuoka, Kenji Taniguchi:
Application of Noise-Enhanced Detection of Subthreshold Signals for Communication Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 92-A(4): 1012-1018 (2009) - [c14]Jun Wang, Toshimasa Matsuoka, Kenji Taniguchi:
A 0.5 V feedforward delta-sigma modulator with inverter-based integrator. ESSCIRC 2009: 328-331 - 2008
- [j19]Jun Wang, Toru Ido, Toshimasa Matsuoka, Kenji Taniguchi:
A novel approach to implement summing function for feedforward Δ-Σ AD modulator. IEICE Electron. Express 5(12): 457-463 (2008) - [j18]Daisuke Kanemoto, Toru Ido, Kenji Taniguchi:
A novel third order Delta Sigma Modulator with one opamp shared among three integrator stages. IEICE Electron. Express 5(24): 1088-1092 (2008) - [j17]Jun Wang, Tuck-Yang Lee, Dong-Gyou Kim, Toshimasa Matsuoka, Kenji Taniguchi:
Design of a 0.5 V Op-Amp Based on CMOS Inverter Using Floating Voltage Sources. IEICE Trans. Electron. 91-C(8): 1375-1378 (2008) - [c13]Hyunju Ham, Toshimasa Matsuoka, Kenji Taniguchi:
Sub-threshold signal detection using noise statistics for communications applications. ICECS 2008: 1167-1170 - 2007
- [j16]Takao Kihara, Gue Chol Kim, Masaru Goto, Keiji Nakamura, Yoshiyuki Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Analytical Expression Based Design of a Low-Voltage FD-SOI CMOS Low-Noise Amplifier. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(2): 317-325 (2007) - [j15]Shunsuke Okura, Tetsuro Okura, Indika U. K. Bogoda Appuhamylage, Kenji Taniguchi:
A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 90-A(2): 358-364 (2007) - 2006
- [j14]Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi:
Analytical GMD formulas for mutual inductance calculation of multilevel interconnects. IEICE Electron. Express 3(3): 44-50 (2006) - [j13]Gue Chol Kim, Yoshiyuki Shimizu, Bunsei Murakami, Masaru Goto, Keisuke Ueda, Takao Kihara, Toshimasa Matsuoka, Kenji Taniguchi:
Accurate Small-Signal Modeling of FD-SOI MOSFETs. IEICE Trans. Electron. 89-C(4): 517-519 (2006) - [c12]Shunsuke Okura, Tetsuro Okura, Kenji Taniguchi, Hajime Shibata:
Frequency Response Analysis of Latch Utilized in High-Speed Comparator. ICECS 2006: 1077-1080 - 2005
- [j12]Sungwoo Cha, Yoshiyuki Shimizu, Gue Chol Kim, Toshimasa Matsuoka, Kenji Taniguchi:
A 1-V 120-MHz FD-SOI CMOS linear-in-dB variable gain amplifier. IEICE Electron. Express 2(7): 249-253 (2005) - [j11]Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi:
Experimental study of integrated tunable transformer. IEICE Electron. Express 2(22): 561-565 (2005) - [j10]Sungwoo Cha, Tetsuya Hirose, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
A CMOS IF Variable Gain Amplifier with Exponential Gain Control. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(2): 410-415 (2005) - [j9]Hideki Shima, Toshimasa Matsuoka, Kenji Taniguchi:
A New Inductance Extraction Technique of On-Wafer Spiral Inductor Based on Analytical Interconnect Formula. IEICE Trans. Electron. 88-C(5): 824-828 (2005) - [j8]Tetsuya Hirose, Toshimasa Matsuoka, Kenji Taniguchi, Tetsuya Asai, Yoshihito Amemiya:
Ultralow-Power Current Reference Circuit with Low Temperature Dependence. IEICE Trans. Electron. 88-C(6): 1142-1147 (2005) - [j7]Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
CMOS Front-End Circuits of Dual-Band GPS Receiver. IEICE Trans. Electron. 88-C(6): 1275-1279 (2005) - [j6]Tsukasa Ida, Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Wired CDMA Interface with Adaptivity for Interconnect Capacitances. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 88-A(10): 2702-2706 (2005) - [c11]Tomoyuki Tanaka, Sungwoo Cha, Shinsaku Shimizu, Tsukasa Ida, Hiroaki Ishihara, Toshimasa Matsuoka, Kenji Taniguchi, Akashi Sugimori, Hiroki Hihara:
A widely tunable Gm-C filter using tail current offset in two differential pairs. ISCAS (1) 2005: 812-815 - 2004
- [j5]Masayuki Furuhashi, Tetsuya Hirose, Hiroshi Tsuji, Masayuki Tachi, Kenji Taniguchi:
Atomic configuration of boron pile-up at the Si/SiO2 interface. IEICE Electron. Express 1(6): 126-130 (2004) - [j4]Yoshiyuki Shimizu, Gue Chol Kim, Bunsei Murakami, Keisuke Ueda, Yoshihiro Utsurogi, Sungwoo Cha, Toshimasa Matsuoka, Kenji Taniguchi:
Drain current response delay of FD-SOI MOSFETs in RF operation. IEICE Electron. Express 1(16): 518-522 (2004) - [c10]Yoshihiro Utsurogi, Masaki Haruoka, Toshimasa Matsuoka, Kenji Taniguchi:
A dual-band image-reject mixer for GPS with 64dB image rejection. ASP-DAC 2004: 541-542 - 2003
- [j3]Mostafa A. R. Eltokhy, Boon-Keat Tan, Toshimasa Matsuoka, Kenji Taniguchi:
A New Analog Correlator Circuit for DS-CDMA Wireless Applications. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. 86-A(5): 1294-1301 (2003) - [j2]Hirobumi Watanabe, Shunsuke Ando, Hideyuki Aota, Masanori Dainin, Yong-Jin Chun, Kenji Taniguchi:
CMOS voltage reference based on gate work function differences in poly-Si controlled by conductivity type and impurity concentration. IEEE J. Solid State Circuits 38(6): 987-994 (2003) - [c9]Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Multiple-bit parallel-CDMA technique for an on-chip interface featuring high data transmission rate, small latency and high noise tolerance. ESSCIRC 2003: 639-642 - [c8]Shinsaku Shimizu, Toshimasa Matsuoka, Kenji Taniguchi:
Parallel bus systems using code-division multiple access technique. ISCAS (2) 2003: 240-243 - 2002
- [c7]T. Gawa, Kenji Taniguchi:
A 50% duty-cycle correction circuit for PLL output. ISCAS (4) 2002: 21-24 - [c6]Mostafa A. R. Eltokhy, Boon-Keat Tan, Toshimasa Matsuoka, Kenji Taniguchi:
A 3.4-mW 128-MHz analog correlator for DS-CDMA wireless applications. ISCAS (5) 2002: 377-380 - [c5]M. Nakamura, Toshimasa Matsuoka, Kenji Taniguchi:
CMOS phase-shift VCO for short-range wireless communication. ISCAS (4) 2002: 405-408 - [c4]Masaru Takahashi, Boon-Keat Tan, Hiroshi Iwamura, Toshimasa Matsuoka, Kenji Taniguchi:
A study of robustness and coupling-noise immunity on simultaneous data transfer CDMA bus interface. ISCAS (4) 2002: 611-614 - 2001
- [c3]Shingo Hatanaka, Kenji Taniguchi:
A ratio-independent algorithmic pipeline analog-to-digital converter. ICECS 2001: 345-348 - [c2]Boon-Keat Tan, Ryuji Yoshimura, Toshimasa Matsuoka, Kenji Taniguchi:
A novel dynamically programmable arithmetic array using code division multiple access bus. ICECS 2001: 913-916
1990 – 1999
- 1990
- [j1]Kenji Taniguchi, Yoshiaki Shibata, Chihiro Hamaguchi:
Process modeling and simulation: boundary conditions for point defect-based impurity diffusion model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9(11): 1177-1183 (1990)
1980 – 1989
- 1985
- [c1]Kenji Taniguchi:
Three dimensional IC's and an application to high speed image processor. IEEE Symposium on Computer Arithmetic 1985: 216-222
Coauthor Index
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