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Antonio Puglielli
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2020 – today
- 2020
- [c5]Greg LaCaille, James Dunn, Antonio Puglielli, Lorenzo Iotti, Sameet Ramakrishnan, Lucas Calderin, Zhenghan Lin, Emily Naviasky, Borivoje Nikolic, Ali M. Niknejad, Elad Alon:
Design and Demonstration of a Scalable Massive MIMO Uplink at E-Band. ICC Workshops 2020: 1-6
2010 – 2019
- 2017
- [j2]Lucas Calderin, Sameet Ramakrishnan, Antonio Puglielli, Elad Alon, Borivoje Nikolic, Ali M. Niknejad:
Analysis and Design of Integrated Active Cancellation Transceiver for Frequency Division Duplex Systems. IEEE J. Solid State Circuits 52(8): 2038-2054 (2017) - [c4]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. ISCA 2017: 27-40 - [i1]Angshuman Parashar, Minsoo Rhu, Anurag Mukkara, Antonio Puglielli, Rangharajan Venkatesan, Brucek Khailany, Joel S. Emer, Stephen W. Keckler, William J. Dally:
SCNN: An Accelerator for Compressed-sparse Convolutional Neural Networks. CoRR abs/1708.04485 (2017) - 2016
- [j1]Antonio Puglielli, Andrew Townley, Greg LaCaille, Vladimir M. Milovanovic, Pengpeng Lu, Konstantin Trotskovsky, Amy Whitcombe, Nathan Narevsky, Gregory Wright, Thomas A. Courtade, Elad Alon, Borivoje Nikolic, Ali M. Niknejad:
Design of Energy- and Cost-Efficient Massive MIMO Arrays. Proc. IEEE 104(3): 586-606 (2016) - [c3]Antonio Puglielli, Greg LaCaille, Ali M. Niknejad, Gregory Wright, Borivoje Nikolic, Elad Alon:
Phase noise scaling and tracking in OFDM multi-user beamforming arrays. ICC 2016: 1-6 - [c2]Sameet Ramakrishnan, Lucas Calderin, Antonio Puglielli, Elad Alon, Ali M. Niknejad, Borivoje Nikolic:
A 65nm CMOS transceiver with integrated active cancellation supporting FDD from 1GHz to 1.8GHz at +12.6dBm TX power leakage. VLSI Circuits 2016: 1-2 - 2015
- [c1]Antonio Puglielli, Nathan Narevsky, Pengpeng Lu, Thomas A. Courtade, Gregory Wright, Borivoje Nikolic, Elad Alon:
A scalable massive MIMO array architecture based on common modules. ICC Workshops 2015: 1310-1315
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