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Hoyoung Tang
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2020 – today
- 2024
- [j6]Jeongkyun Kim, Byungho Yook, Youngo Lee, Taemin Choi, Kyuwon Choi, Chanho Lee, Juchang Lee, Hyeongcheol Kim, Seok Yun, Changhoon Do, Minwoo Kwak, Mijoung Kim, Yunrong Li, Hoyoung Tang, Jaeyoung Kim, Inhak Lee, Dongwook Seo, Sangyeop Baeck:
A 4.13-GHz UHS Pseudo Two-Port SRAM With BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4-nm FinFET Technology. IEEE J. Solid State Circuits 59(4): 1216-1224 (2024) - 2023
- [c7]Jeongkyun Kim, Byungho Yook, Taemin Choi, Kyuwon Choi, Chanho Lee, Yunrong Li, Youngo Lee, Seok Yun, Changhoon Do, Hoyoung Tang, Inhak Lee, Dongwook Seo, Sangyeop Baeck:
A 4.0GHz UHS Pseudo Two-port SRAM with BL Charge Time Reduction and Flying Word-Line for HPC Applications in 4nm FinFET Technology. VLSI Technology and Circuits 2023: 1-2 - 2022
- [c6]Taejoong Song, Hakchul Jung, Giyoung Yang, Hoyoung Tang, Hayoung Kim, Dongwook Seo, Hoonki Kim, Woojin Rim, Sanghoon Baek, Sangyeop Baeck, Jonghoon Jung:
3nm Gate-All-Around (GAA) Design-Technology Co-Optimization (DTCO) for succeeding PPA by Technology. CICC 2022: 1-7 - 2021
- [c5]Sangyeop Baeck, Inhak Lee, Hoyoung Tang, Dongwook Seo, Jaeseung Choi, Taejoong Song, Jongwook Kye:
5nm Low Power SRAM Featuring Dual-Rail Architecture with Voltage-Tracking Assist Circuit for 5G mobile application. VLSI Circuits 2021: 1-2 - 2020
- [j5]Hoyoung Tang, Donghyeon Cho, Dongwoo Lew, Taehwan Kim, Jongsun Park:
Rank order coding based spiking convolutional neural network architecture with energy-efficient membrane voltage updates. Neurocomputing 407: 300-312 (2020) - [j4]Heetak Kim, Hoyoung Tang, Woong Choi, Jongsun Park:
An Energy-Quality Scalable STDP Based Sparse Coding Processor With On-Chip Learning Capability. IEEE Trans. Biomed. Circuits Syst. 14(1): 125-137 (2020)
2010 – 2019
- 2019
- [j3]Hoyoung Tang, Heetak Kim, Hyeonseong Kim, Jongsun Park:
Spike Counts Based Low Complexity SNN Architecture With Binary Synapse. IEEE Trans. Biomed. Circuits Syst. 13(6): 1664-1677 (2019) - [c4]Heetak Kim, Hoyoung Tang, Jongsun Park:
An Energy-efficient On-chip Learning Architecture for STDP based Sparse Coding. ISLPED 2019: 1-6 - 2018
- [j2]Juseong Lee, Hoyoung Tang, Jongsun Park:
Energy Efficient Canny Edge Detector for Advanced Mobile Vision Applications. IEEE Trans. Circuits Syst. Video Technol. 28(4): 1037-1046 (2018) - [c3]Hoyoung Tang, Heetak Kim, Donghyeon Cho, Jongsun Park:
Spike Counts Based Low Complexity Learning with Binary Synapse. IJCNN 2018: 1-8 - 2016
- [j1]Hoyoung Tang, Jongsun Park:
Unequal-Error-Protection Error Correction Codes for the Embedded Memories in Digital Signal Processors. IEEE Trans. Very Large Scale Integr. Syst. 24(6): 2397-2401 (2016) - [c2]Sangkyu Lee, Hoyoung Tang, Kyungrak Choi, Jongsun Park:
Customized SRAM design for low power video code applications. ISOCC 2016: 79-80 - 2015
- [c1]Hoyoung Tang, Gihoon Jung, Jongsun Park:
A hybrid multimode BCH encoder architecture for area efficient re-encoding approach. ISCAS 2015: 1997-2000
Coauthor Index
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