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ORCIDXiangyu Meng 0003
Person information
- affiliation: The Hong Kong University of Science and Technology, Hong Kong
- affiliation: Sun Yat-Sen University, School of Electronics and Information Technology, Guangzhou, China
Other persons with the same name
- Xiangyu Meng — disambiguation page
- Xiangyu Meng 0001
![[0000-0003-3381-6690]](https://dblp.uni-trier.de./img/orcid-mark.12x12.png "0000-0003-3381-6690")
— Louisiana State University, Baton Rouge, LA, USA - Xiangyu Meng 0002 — Jilin University, Changchun, China
- Xiangyu Meng 0004 — The ZTE Corporation of China, Shenzhen, China
- Xiangyu Meng 0005 — China University of Petroleum, Qingdao, China
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2020 – today
- 2024
[j5]Ting Huang, Xiangyu Meng, Gaoyuan Zhao, Baoyong Chi:
A 3.3-V Ku-Band Front-End Module With 2.6-dB NF and 18.9-dBm OP1dB in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 71(10): 4481-4485 (2024)- [c7]Biao Wang, Xiangyu Meng, Fangfei Ming:
A V-Band Low-Phase-Noise VCO with Transformer-Based Gm-Boosting Technique. ISCAS 2024: 1-4 - 2023
- [j4]Xiangyu Meng, Wang Xie, Jiaqi Zhang, Zhao Zhang:
A 0.2-7.1-Gb/s Low-Jitter Full-Rate Reference-Less CDR for Communication Signal Analyzers. IEEE Trans. Instrum. Meas. 72: 1-8 (2023) - 2021
- [j3]Huipeng Deng, Jian Wang, Huafeng Ye, Shanlin Xiao, Xiangyu Meng, Zhiyi Yu:
Dimension fusion: Dimension-level dynamically composable accelerator for convolutional neural networks. IEICE Electron. Express 18(24): 20210491 (2021) - [c6]Huipeng Deng, Jian Wang, Huafeng Ye, Shanlin Xiao, Xiangyu Meng, Zhiyi Yu:
3D-VNPU: A Flexible Accelerator for 2D/3D CNNs on FPGA. FCCM 2021: 181-185 - [c5]Xiangyu Meng, Weihao Kong, Haifeng Yang, Yecong Li, Xuan Li:
A 1.8-GS/s 6-Bit Two-Step SAR ADC in 65-nm CMOS. ISCAS 2021: 1-4 - 2020
- [j2]Xiangyu Meng, Milad Kalantari, Baoyong Chi, Wenhua Chen, Zhijian Chen, Xiaoling Lin, C. Patrick Yue:
A 28-GHz 16-Gb/s High Efficiency 16-QAM Transmitter in 65-nm CMOS. IEEE Trans. Circuits Syst. I Regul. Pap. 67-I(6): 1835-1845 (2020) - [c4]Zhenpeng Zheng, Xiangyu Meng, Jiaqi Zhang, Mo Zhou, Dihu Chen:
W-Band Synthesized Modulator and Demodulator with Wideband Performance in 65-nm CMOS. ISCAS 2020: 1-4 - [c3]Jiaqi Zhang, Xiangyu Meng:
A 0.5-5 GHz 0.3-mW 50% duty-cycle corrector in 65-nm CMOS. TENCON 2020: 351-354
2010 – 2019
- 2019
- [j1]Xiangyu Meng, Baoyong Chi, Yibo Liu, Taikun Ma, Zhihua Wang:
A Fully Integrated 150-GHz Transceiver Front-End in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 66-II(4): 602-606 (2019) - [c2]Xiangyu Meng, Zhenpeng Zheng, Jiaqi Zhang, C. Patrick Yue:
A 28-GHz Compact SPDT Switch Using LC-Based Spiral Transmission Lines in 65-nm CMOS. A-SSCC 2019: 79-80 - 2018
- [c1]Xiangyu Meng, Can Wang, Milad Kalantari, C. Patrick Yue:
A 16-GB/S 0-DB Power Back-Off 16-QAM Transmitter at 28 GHZ in 65-NM CMOS. VLSI Circuits 2018: 217-218
Coauthor Index
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